Add TARGET_5200 to conditions which determine whether the extbl instruction is emitted.

Add TARGET_5200 to conditions which determine whether the extbl instruction
is emitted.
(mulsi3): Enable pattern with TARGET_5200.

From-SVN: r12516

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 73051fd..9fb0c8c 100644 (file)
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1646,7 +1646,7 @@
 {
   CC_STATUS_INIT;
   operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
-  if (TARGET_68020)
+  if (TARGET_68020 || TARGET_5200)
     return \"move%.b %1,%2\;extb%.l %2\;smi %0\;extb%.l %0\";
   else
     return \"move%.b %1,%2\;ext%.w %0\;ext%.l %2\;move%.l %2,%0\;smi %0\";
@@ -1661,7 +1661,7 @@
 {
   CC_STATUS_INIT;
   operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
-  if (TARGET_68020)
+  if (TARGET_68020 || TARGET_5200)
     return \"move%.w %1,%2\;ext%.l %2\;smi %0\;extb%.l %0\";
   else
     return \"move%.w %1,%2\;ext%.l %2\;smi %0\;ext%.w %0\;ext%.l %0\";
@@ -1676,7 +1676,7 @@
 {
   CC_STATUS_INIT;
   operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
-  if (TARGET_68020)
+  if (TARGET_68020 || TARGET_5200)
     return \"move%.l %1,%2\;smi %0\;extb%.l %0\";
   else
     return \"move%.l %1,%2\;smi %0\;ext%.w %0\;ext%.l %0\";
@@ -1708,7 +1708,7 @@
     output_asm_insn (\"add%.l %2,%3\", operands);
   else
     output_asm_insn (\"move%.l %2,%3\;add%.l %1,%3\", operands);
-  if (TARGET_68020)
+  if (TARGET_68020 || TARGET_5200)
     return \"smi %0\;extb%.l %0\";
   else
     return \"smi %0\;ext%.w %0\;ext%.l %0\";
@@ -1735,7 +1735,7 @@
 (define_insn "extendqisi2"
   [(set (match_operand:SI 0 "general_operand" "=d")
        (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "0")))]
-  "TARGET_68020"
+  "TARGET_68020 || TARGET_5200"
   "extb%.l %0")
 \f
 ;; Conversions between float and double.
@@ -2034,7 +2034,7 @@
    && GET_CODE (XEXP (operands[1], 0)) == PRE_DEC)
     output_asm_insn (\"move%.l %4,%3\", operands);
   output_asm_insn (\"move%.l %1,%0\;smi %2\", operands);
-  if (TARGET_68020)
+  if (TARGET_68020 || TARGET_5200)
     output_asm_insn (\"extb%.l %2\", operands);
   else
     output_asm_insn (\"ext%.w %2\;ext%.l %2\", operands);
@@ -2947,7 +2947,7 @@
   [(set (match_operand:SI 0 "general_operand" "=d")
        (mult:SI (match_operand:SI 1 "general_operand" "%0")
                 (match_operand:SI 2 "general_operand" "dmsK")))]
-  "TARGET_68020"
+  "TARGET_68020 || TARGET_5200"
   "muls%.l %2,%0")
 
 (define_insn "umulhisi3"
@@ -6343,7 +6343,8 @@
          else
            output_asm_insn (\"addq%.l %1,%0\", xoperands);
        }
-      else if (INTVAL (xoperands[1]) <= 16 && TARGET_68020 && !TARGET_68060)
+      else if (INTVAL (xoperands[1]) <= 16 
+              && TARGET_68020 && !TARGET_68040 && !TARGET_68060)
        {
          xoperands[1] = gen_rtx (CONST_INT, VOIDmode,
                                  INTVAL (xoperands[1]) - 8);
@@ -6385,7 +6386,8 @@
          else
            output_asm_insn (\"addq%.l %1,%0\", xoperands);
        }
-      else if (INTVAL (xoperands[1]) <= 16 && TARGET_68020 && !TARGET_68060)
+      else if (INTVAL (xoperands[1]) <= 16 
+              && TARGET_68020 && !TARGET_68040 && !TARGET_68060)
        {
          xoperands[1] = gen_rtx (CONST_INT, VOIDmode,
                                  INTVAL (xoperands[1]) - 8);