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pinctrl: nand: meson-gxl: fix missing data pins
author
Yixun Lan
<yixun.lan@amlogic.com>
Wed, 9 May 2018 22:08:27 +0000
(22:08 +0000)
committer
Linus Walleij
<linus.walleij@linaro.org>
Wed, 16 May 2018 14:23:57 +0000
(16:23 +0200)
The data pin 0-7 of the NAND controller are actually missing from
the nand pinctrl group, so we fix it here.
Fixes:
0f15f500ff2c
("pinctrl: meson: Add GXL pinctrl definitions")
Reported-by: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/meson/pinctrl-meson-gxl.c
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diff --git
a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index
b3786cd
..
7dae1d7
100644
(file)
--- a/
drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/
drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@
-617,8
+617,8
@@
static const char * const sdio_groups[] = {
};
static const char * const nand_groups[] = {
- "
nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_c
le",
- "nand_wen_clk", "nand_ren_wr", "nand_dqs",
+ "
emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_a
le",
+ "nand_
cle", "nand_
wen_clk", "nand_ren_wr", "nand_dqs",
};
static const char * const uart_a_groups[] = {