drm/i915: Remove superfluous GEN8_LR_CONTEXT_ALIGN
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 27 Jul 2018 09:29:47 +0000 (10:29 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 27 Jul 2018 10:30:42 +0000 (11:30 +0100)
As GEN8_LR_CONTEXT_ALIGN is I915_GTT_MIN_ALIGNMENT is it functionally
equivalent to 0, and we will not be able to reduce the min-alignment for
the GTT, so passing 0 is and will remain equivalent.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727092947.1953-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_lrc.h

index 986f849..66c7252 100644 (file)
@@ -1306,7 +1306,7 @@ static int __context_pin(struct i915_gem_context *ctx, struct i915_vma *vma)
        if (ctx->ggtt_offset_bias)
                flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias;
 
-       return i915_vma_pin(vma, 0, GEN8_LR_CONTEXT_ALIGN, flags);
+       return i915_vma_pin(vma, 0, 0, flags);
 }
 
 static struct intel_context *
index 4dfb78e..f5a5502 100644 (file)
@@ -27,8 +27,6 @@
 #include "intel_ringbuffer.h"
 #include "i915_gem_context.h"
 
-#define GEN8_LR_CONTEXT_ALIGN I915_GTT_MIN_ALIGNMENT
-
 /* Execlists regs */
 #define RING_ELSP(engine)                      _MMIO((engine)->mmio_base + 0x230)
 #define RING_EXECLIST_STATUS_LO(engine)                _MMIO((engine)->mmio_base + 0x234)