net/mlx5e: MACsec, remove replay window size limitation in offload path

Currently offload path limits replay window size to 32/64/128/256 bits,
such a limitation should not exist since software allows it.
Remove such limitation.

Fixes: eb43846b43c3 ("net/mlx5e: Support MACsec offload replay window")
Signed-off-by: Emeel Hakim <ehakim@nvidia.com>
Reviewed-by: Raed Salem <raeds@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
index c19581f..72f8be6 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
@@ -229,22 +229,6 @@ static int macsec_set_replay_protection(struct mlx5_macsec_obj_attrs *attrs, voi
        if (!attrs->replay_protect)
                return 0;
 
-       switch (attrs->replay_window) {
-       case 256:
-               window_sz = MLX5_MACSEC_ASO_REPLAY_WIN_256BIT;
-               break;
-       case 128:
-               window_sz = MLX5_MACSEC_ASO_REPLAY_WIN_128BIT;
-               break;
-       case 64:
-               window_sz = MLX5_MACSEC_ASO_REPLAY_WIN_64BIT;
-               break;
-       case 32:
-               window_sz = MLX5_MACSEC_ASO_REPLAY_WIN_32BIT;
-               break;
-       default:
-               return -EINVAL;
-       }
        MLX5_SET(macsec_aso, aso_ctx, window_size, window_sz);
        MLX5_SET(macsec_aso, aso_ctx, mode, MLX5_MACSEC_ASO_REPLAY_PROTECTION);
 

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 5a4e914..981fc7d 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -11611,13 +11611,6 @@ enum {
        MLX5_MACSEC_ASO_REPLAY_PROTECTION = 0x1,
 };
 
-enum {
-       MLX5_MACSEC_ASO_REPLAY_WIN_32BIT  = 0x0,
-       MLX5_MACSEC_ASO_REPLAY_WIN_64BIT  = 0x1,
-       MLX5_MACSEC_ASO_REPLAY_WIN_128BIT = 0x2,
-       MLX5_MACSEC_ASO_REPLAY_WIN_256BIT = 0x3,
-};
-
 #define MLX5_MACSEC_ASO_INC_SN  0x2
 #define MLX5_MACSEC_ASO_REG_C_4_5 0x2