2015-03-10 Michael Collison <michael.collison@linaro.org>
authorcollison <collison@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 10 Mar 2015 23:49:02 +0000 (23:49 +0000)
committercollison <collison@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 10 Mar 2015 23:49:02 +0000 (23:49 +0000)
Backport from trunk r217725.
2014-11-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp):
Split into...
(cortex_a15_gp_to_vfp): ...This.
(cortex_a15_fp_to_gp): ...And this.
Define and comment bypass from vfp operations to fp->gp moves.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221339 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog.linaro
gcc/config/arm/cortex-a15-neon.md

index 73fca0a..36e0463 100644 (file)
@@ -1,5 +1,16 @@
 2015-03-10  Michael Collison  <michael.collison@linaro.org>
 
+       Backport from trunk r217725.
+       2014-11-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp):
+       Split into...
+       (cortex_a15_gp_to_vfp): ...This.
+       (cortex_a15_fp_to_gp): ...And this.
+       Define and comment bypass from vfp operations to fp->gp moves.
+
+2015-03-10  Michael Collison  <michael.collison@linaro.org>
+
        Backport from trunk r217780.
        2014-11-19  Wilco Dijkstra  <wdijkstr@arm.com>
 
index 02d4a53..bc09cd6 100644 (file)
        (eq_attr "type" "fmov"))
   "ca15_issue1,ca15_cx_perm")
 
-(define_insn_reservation "cortex_a15_vfp_to_from_gp" 5
+(define_insn_reservation "cortex_a15_gp_to_vfp" 5
   (and (eq_attr "tune" "cortexa15")
-       (eq_attr "type" "f_mcr, f_mcrr, f_mrc, f_mrrc"))
-  "ca15_issue1,ca15_ls1+ca15_ls2")
+       (eq_attr "type" "f_mcr, f_mcrr"))
+  "ca15_issue1,ca15_ls")
+
+(define_insn_reservation "cortex_a15_mov_vfp_to_gp" 5
+  (and (eq_attr "tune" "cortexa15")
+       (eq_attr "type" "f_mrc, f_mrrc"))
+  "ca15_issue1,ca15_ls")
+
+;; Moves from floating point registers to general purpose registers
+;; induce additional latency.
+(define_bypass 10 "cortex_a15_vfp*, cortex_a15_neon*, cortex_a15_gp_to_vfp" "cortex_a15_mov_vfp_to_gp")
+
 
 (define_insn_reservation "cortex_a15_vfp_ariths" 7
   (and (eq_attr "tune" "cortexa15")