bool optimize_predicate(nir_alu_instr *instr, enum brw_predicate *predicate);
+ void emit_conversion_from_double(dst_reg dst, src_reg src, bool saturate,
+ brw_reg_type single_type);
+ void emit_conversion_to_double(dst_reg dst, src_reg src, bool saturate,
+ brw_reg_type single_type);
+
virtual void emit_nir_code();
virtual void nir_setup_uniforms();
virtual void nir_setup_system_value_intrinsic(nir_intrinsic_instr *instr);
}
void
+vec4_visitor::emit_conversion_from_double(dst_reg dst, src_reg src,
+ bool saturate,
+ brw_reg_type single_type)
+{
+ dst_reg temp = dst_reg(this, glsl_type::dvec4_type);
+ emit(MOV(temp, src));
+
+ dst_reg temp2 = dst_reg(this, glsl_type::dvec4_type);
+ temp2 = retype(temp2, single_type);
+ emit(VEC4_OPCODE_FROM_DOUBLE, temp2, src_reg(temp))
+ ->size_written = 2 * REG_SIZE;
+
+ vec4_instruction *inst = emit(MOV(dst, src_reg(temp2)));
+ inst->saturate = saturate;
+}
+
+void
+vec4_visitor::emit_conversion_to_double(dst_reg dst, src_reg src,
+ bool saturate,
+ brw_reg_type single_type)
+{
+ dst_reg tmp_dst = dst_reg(src_reg(this, glsl_type::dvec4_type));
+ src_reg tmp_src = retype(src_reg(this, glsl_type::vec4_type), single_type);
+ emit(MOV(dst_reg(tmp_src), retype(src, single_type)));
+ emit(VEC4_OPCODE_TO_DOUBLE, tmp_dst, tmp_src);
+ vec4_instruction *inst = emit(MOV(dst, src_reg(tmp_dst)));
+ inst->saturate = saturate;
+}
+
+void
vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
{
vec4_instruction *inst;
inst = emit(MOV(dst, op[0]));
break;
- case nir_op_d2f: {
- dst_reg temp = dst_reg(this, glsl_type::dvec4_type);
- emit(MOV(temp, op[0]));
-
- dst_reg temp2 = dst_reg(this, glsl_type::dvec4_type);
- temp2 = retype(temp2, BRW_REGISTER_TYPE_F);
- emit(VEC4_OPCODE_FROM_DOUBLE, temp2, src_reg(temp))
- ->size_written = 2 * REG_SIZE;
-
- vec4_instruction *inst = emit(MOV(dst, src_reg(temp2)));
- inst->saturate = instr->dest.saturate;
+ case nir_op_d2f:
+ emit_conversion_from_double(dst, op[0], instr->dest.saturate,
+ BRW_REGISTER_TYPE_F);
break;
- }
- case nir_op_f2d: {
- dst_reg tmp_dst = dst_reg(src_reg(this, glsl_type::dvec4_type));
- src_reg tmp_src = src_reg(this, glsl_type::vec4_type);
- emit(MOV(dst_reg(tmp_src), retype(op[0], BRW_REGISTER_TYPE_F)));
- emit(VEC4_OPCODE_TO_DOUBLE, tmp_dst, tmp_src);
- vec4_instruction *inst = emit(MOV(dst, src_reg(tmp_dst)));
- inst->saturate = instr->dest.saturate;
+ case nir_op_f2d:
+ emit_conversion_to_double(dst, op[0], instr->dest.saturate,
+ BRW_REGISTER_TYPE_F);
break;
- }
case nir_op_iadd:
assert(nir_dest_bit_size(instr->dest.dest) < 64);