ARM: dts: Configure interconnect target module for omap3 sdma
authorTony Lindgren <tony@atomide.com>
Mon, 16 Dec 2019 22:41:53 +0000 (14:41 -0800)
committerTony Lindgren <tony@atomide.com>
Tue, 17 Dec 2019 16:06:09 +0000 (08:06 -0800)
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that we want to use separate compatible for omap34xx and
omap36xx so let's do that here too while at it.

Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Vinod Koul <vkoul@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/omap3-n900.dts
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap36xx.dtsi

index a638e05..c3c6d7d 100644 (file)
        regulator-always-on;
 };
 
+/* First two dma channels are reserved on secure omap3 */
+&sdma {
+       dma-channel-mask = <0xfffffffc>;
+};
+
 &twl {
        twl_audio: audio {
                compatible = "ti,twl4030-audio";
index 5698a3e..06d9108 100644 (file)
                        reg = <0x48200000 0x1000>;
                };
 
-               sdma: dma-controller@48056000 {
-                       compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
-                       reg = <0x48056000 0x1000>;
-                       interrupts = <12>,
-                                    <13>,
-                                    <14>,
-                                    <15>;
-                       #dma-cells = <1>;
-                       dma-channels = <32>;
-                       dma-requests = <96>;
+               target-module@48056000 {
+                       compatible = "ti,sysc-omap2", "ti,sysc";
                        ti,hwmods = "dma";
+                       reg = <0x48056000 0x4>,
+                             <0x4805602c 0x4>,
+                             <0x48056028 0x4>;
+                       reg-names = "rev", "sysc", "syss";
+                       ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+                                        SYSC_OMAP2_EMUFREE |
+                                        SYSC_OMAP2_SOFTRESET |
+                                        SYSC_OMAP2_AUTOIDLE)>;
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,syss-mask = <1>;
+                       /* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */
+                       clocks = <&core_l3_ick>;
+                       clock-names = "ick";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x48056000 0x1000>;
+
+                       sdma: dma-controller@0 {
+                               compatible = "ti,omap3430-sdma", "ti,omap-sdma";
+                               reg = <0x0 0x1000>;
+                               interrupts = <12>,
+                                            <13>,
+                                            <14>,
+                                            <15>;
+                               #dma-cells = <1>;
+                               dma-channels = <32>;
+                               dma-requests = <96>;
+                       };
                };
 
                gpio1: gpio@48310000 {
index c618cb2..71f3c8f 100644 (file)
        };
 };
 
+&sdma {
+       compatible = "ti,omap3630-sdma", "ti,omap-sdma";
+};
+
 /* OMAP3630 needs dss_96m_fck for VENC */
 &venc {
        clocks = <&dss_tv_fck>, <&dss_96m_fck>;