ARM: dts: stm32: add timers support on stm32mp131

Add timers support to STM32MP13x SoC family.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 2f0f60e..f50051e 100644 (file)
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -119,6 +119,221 @@
                        };
                };
 
+               timers2: timer@40000000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x40000000 0x400>;
+                       interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM2_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 18 0x400 0x1>,
+                              <&dmamux1 19 0x400 0x1>,
+                              <&dmamux1 20 0x400 0x1>,
+                              <&dmamux1 21 0x400 0x1>,
+                              <&dmamux1 22 0x400 0x1>;
+                       dma-names = "ch1", "ch2", "ch3", "ch4", "up";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@1 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <1>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-timer-counter";
+                               status = "disabled";
+                       };
+               };
+
+               timers3: timer@40001000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x40001000 0x400>;
+                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM3_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 23 0x400 0x1>,
+                              <&dmamux1 24 0x400 0x1>,
+                              <&dmamux1 25 0x400 0x1>,
+                              <&dmamux1 26 0x400 0x1>,
+                              <&dmamux1 27 0x400 0x1>,
+                              <&dmamux1 28 0x400 0x1>;
+                       dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@2 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <2>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-timer-counter";
+                               status = "disabled";
+                       };
+               };
+
+               timers4: timer@40002000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x40002000 0x400>;
+                       interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM4_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 29 0x400 0x1>,
+                              <&dmamux1 30 0x400 0x1>,
+                              <&dmamux1 31 0x400 0x1>,
+                              <&dmamux1 32 0x400 0x1>;
+                       dma-names = "ch1", "ch2", "ch3", "up";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@3 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <3>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-timer-counter";
+                               status = "disabled";
+                       };
+               };
+
+               timers5: timer@40003000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x40003000 0x400>;
+                       interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM5_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 55 0x400 0x1>,
+                              <&dmamux1 56 0x400 0x1>,
+                              <&dmamux1 57 0x400 0x1>,
+                              <&dmamux1 58 0x400 0x1>,
+                              <&dmamux1 59 0x400 0x1>,
+                              <&dmamux1 60 0x400 0x1>;
+                       dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@4 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <4>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-timer-counter";
+                               status = "disabled";
+                       };
+               };
+
+               timers6: timer@40004000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x40004000 0x400>;
+                       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM6_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 69 0x400 0x1>;
+                       dma-names = "up";
+                       status = "disabled";
+
+                       timer@5 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <5>;
+                               status = "disabled";
+                       };
+               };
+
+               timers7: timer@40005000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x40005000 0x400>;
+                       interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM7_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 70 0x400 0x1>;
+                       dma-names = "up";
+                       status = "disabled";
+
+                       timer@6 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <6>;
+                               status = "disabled";
+                       };
+               };
+
+               lptimer1: timer@40009000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x40009000 0x400>;
+                       interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc LPTIM1_K>;
+                       clock-names = "mux";
+                       wakeup-source;
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       trigger@0 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <0>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-lptimer-counter";
+                               status = "disabled";
+                       };
+
+                       timer {
+                               compatible = "st,stm32-lptimer-timer";
+                               status = "disabled";
+                       };
+               };
+
                i2s2: audio-controller@4000b000 {
                        compatible = "st,stm32h7-i2s";
                        reg = <0x4000b000 0x400>;
@@ -227,6 +442,88 @@
                        status = "disabled";
                };
 
+               timers1: timer@44000000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x44000000 0x400>;
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "brk", "up", "trg-com", "cc";
+                       clocks = <&rcc TIM1_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 11 0x400 0x1>,
+                              <&dmamux1 12 0x400 0x1>,
+                              <&dmamux1 13 0x400 0x1>,
+                              <&dmamux1 14 0x400 0x1>,
+                              <&dmamux1 15 0x400 0x1>,
+                              <&dmamux1 16 0x400 0x1>,
+                              <&dmamux1 17 0x400 0x1>;
+                       dma-names = "ch1", "ch2", "ch3", "ch4",
+                                   "up", "trig", "com";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@0 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <0>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-timer-counter";
+                               status = "disabled";
+                       };
+               };
+
+               timers8: timer@44001000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x44001000 0x400>;
+                       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "brk", "up", "trg-com", "cc";
+                       clocks = <&rcc TIM8_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 47 0x400 0x1>,
+                              <&dmamux1 48 0x400 0x1>,
+                              <&dmamux1 49 0x400 0x1>,
+                              <&dmamux1 50 0x400 0x1>,
+                              <&dmamux1 51 0x400 0x1>,
+                              <&dmamux1 52 0x400 0x1>,
+                              <&dmamux1 53 0x400 0x1>;
+                       dma-names = "ch1", "ch2", "ch3", "ch4",
+                                   "up", "trig", "com";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@7 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <7>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-timer-counter";
+                               status = "disabled";
+                       };
+               };
+
                i2s1: audio-controller@44004000 {
                        compatible = "st,stm32h7-i2s";
                        reg = <0x44004000 0x400>;
@@ -544,6 +841,161 @@
                        status = "disabled";
                };
 
+               timers12: timer@4c007000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x4c007000 0x400>;
+                       interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM12_K>;
+                       clock-names = "int";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@11 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <11>;
+                               status = "disabled";
+                       };
+               };
+
+               timers13: timer@4c008000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x4c008000 0x400>;
+                       interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM13_K>;
+                       clock-names = "int";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@12 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <12>;
+                               status = "disabled";
+                       };
+               };
+
+               timers14: timer@4c009000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x4c009000 0x400>;
+                       interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM14_K>;
+                       clock-names = "int";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@13 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <13>;
+                               status = "disabled";
+                       };
+               };
+
+               timers15: timer@4c00a000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x4c00a000 0x400>;
+                       interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM15_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 105 0x400 0x1>,
+                              <&dmamux1 106 0x400 0x1>,
+                              <&dmamux1 107 0x400 0x1>,
+                              <&dmamux1 108 0x400 0x1>;
+                       dma-names = "ch1", "up", "trig", "com";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@14 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <14>;
+                               status = "disabled";
+                       };
+               };
+
+               timers16: timer@4c00b000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x4c00b000 0x400>;
+                       interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM16_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 109 0x400 0x1>,
+                              <&dmamux1 110 0x400 0x1>;
+                       dma-names = "ch1", "up";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@15 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <15>;
+                               status = "disabled";
+                       };
+               };
+
+               timers17: timer@4c00c000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-timers";
+                       reg = <0x4c00c000 0x400>;
+                       interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "global";
+                       clocks = <&rcc TIM17_K>;
+                       clock-names = "int";
+                       dmas = <&dmamux1 111 0x400 0x1>,
+                              <&dmamux1 112 0x400 0x1>;
+                       dma-names = "ch1", "up";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer@16 {
+                               compatible = "st,stm32h7-timer-trigger";
+                               reg = <16>;
+                               status = "disabled";
+                       };
+               };
+
                rcc: rcc@50000000 {
                        compatible = "st,stm32mp13-rcc", "syscon";
                        reg = <0x50000000 0x1000>;
@@ -570,6 +1022,111 @@
                        clocks = <&rcc SYSCFG>;
                };
 
+               lptimer2: timer@50021000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50021000 0x400>;
+                       interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc LPTIM2_K>;
+                       clock-names = "mux";
+                       wakeup-source;
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       trigger@1 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <1>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-lptimer-counter";
+                               status = "disabled";
+                       };
+
+                       timer {
+                               compatible = "st,stm32-lptimer-timer";
+                               status = "disabled";
+                       };
+               };
+
+               lptimer3: timer@50022000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50022000 0x400>;
+                       interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc LPTIM3_K>;
+                       clock-names = "mux";
+                       wakeup-source;
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       trigger@2 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <2>;
+                               status = "disabled";
+                       };
+
+                       timer {
+                               compatible = "st,stm32-lptimer-timer";
+                               status = "disabled";
+                       };
+               };
+
+               lptimer4: timer@50023000 {
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50023000 0x400>;
+                       interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc LPTIM4_K>;
+                       clock-names = "mux";
+                       wakeup-source;
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer {
+                               compatible = "st,stm32-lptimer-timer";
+                               status = "disabled";
+                       };
+               };
+
+               lptimer5: timer@50024000 {
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50024000 0x400>;
+                       interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc LPTIM5_K>;
+                       clock-names = "mux";
+                       wakeup-source;
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       timer {
+                               compatible = "st,stm32-lptimer-timer";
+                               status = "disabled";
+                       };
+               };
+
                mdma: dma-controller@58000000 {
                        compatible = "st,stm32h7-mdma";
                        reg = <0x58000000 0x1000>;