* config/rx/rx.c (valid_psw_flag): New.
(rx_expand_builtin): Call it for setpsw/clrpsw.
(rx_expand_builtin_mvtipl): Pass an integer to IN_RANGE, not an
RTX.
* config/rx/rx.md (bitclr): Don't mark the output as early-clobber.
(bitclr_in_memory): Likewise.
(clrspw, setpsw, mvfc, mvtc, mvtipl): Make volatile.
From-SVN: r164376
+2010-09-17 DJ Delorie <dj@redhat.com>
+
+ * config/rx/rx.c (rx_print_operand): If __builtin_rx_setpsw() is
+ passed an invalid value, print an error instead of ICEing.
+ (valid_psw_flag): New.
+ (rx_expand_builtin): Call it for setpsw/clrpsw.
+ (rx_expand_builtin_mvtipl): Pass an integer to IN_RANGE, not an
+ RTX.
+
+ * config/rx/rx.md (bitclr): Don't mark the output as early-clobber.
+ (bitclr_in_memory): Likewise.
+ (clrspw, setpsw, mvfc, mvtc, mvtipl): Make volatile.
+
2010-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR middle-end/45678
if (rx_cpu_type == RX610)
return NULL_RTX;
- if (! CONST_INT_P (arg) || ! IN_RANGE (arg, 0, (1 << 4) - 1))
+ if (! CONST_INT_P (arg) || ! IN_RANGE (INTVAL (arg), 0, (1 << 4) - 1))
return NULL_RTX;
emit_insn (gen_mvtipl (arg));
return target;
}
+static int
+valid_psw_flag (rtx op, char *which)
+{
+ static int mvtc_inform_done = 0;
+
+ if (GET_CODE (op) == CONST_INT)
+ switch (INTVAL (op))
+ {
+ case 0: case 'c': case 'C':
+ case 1: case 'z': case 'Z':
+ case 2: case 's': case 'S':
+ case 3: case 'o': case 'O':
+ case 8: case 'i': case 'I':
+ case 9: case 'u': case 'U':
+ return 1;
+ }
+
+ error ("__builtin_rx_%s takes 'C', 'Z', 'S', 'O', 'I', or 'U'", which);
+ if (!mvtc_inform_done)
+ error ("use __builtin_rx_mvtc (0, ... ) to write arbitrary values to PSW");
+ mvtc_inform_done = 1;
+
+ return 0;
+}
+
static rtx
rx_expand_builtin (tree exp,
rtx target,
switch (fcode)
{
case RX_BUILTIN_BRK: emit_insn (gen_brk ()); return NULL_RTX;
- case RX_BUILTIN_CLRPSW: return rx_expand_void_builtin_1_arg
- (op, gen_clrpsw, false);
- case RX_BUILTIN_SETPSW: return rx_expand_void_builtin_1_arg
- (op, gen_setpsw, false);
+ case RX_BUILTIN_CLRPSW:
+ if (!valid_psw_flag (op, "clrpsw"))
+ return NULL_RTX;
+ return rx_expand_void_builtin_1_arg (op, gen_clrpsw, false);
+ case RX_BUILTIN_SETPSW:
+ if (!valid_psw_flag (op, "setpsw"))
+ return NULL_RTX;
+ return rx_expand_void_builtin_1_arg (op, gen_setpsw, false);
case RX_BUILTIN_INT: return rx_expand_void_builtin_1_arg
(op, gen_int, false);
case RX_BUILTIN_MACHI: return rx_expand_builtin_mac (exp, gen_machi);
)
(define_insn "bitclr"
- [(set:SI (match_operand:SI 0 "register_operand" "+r")
+ [(set:SI (match_operand:SI 0 "register_operand" "=r")
(and:SI (match_operand:SI 1 "register_operand" "0")
(not:SI (ashift:SI (const_int 1)
(match_operand:SI 2 "nonmemory_operand" "ri")))))]
)
(define_insn "bitclr_in_memory"
- [(set:QI (match_operand:QI 0 "memory_operand" "+m")
+ [(set:QI (match_operand:QI 0 "memory_operand" "=m")
(and:QI (match_operand:QI 1 "memory_operand" "0")
(not:QI (ashift:QI (const_int 1)
(match_operand:QI 2 "nonmemory_operand" "ri")))))]
;; Clear Processor Status Word
(define_insn "clrpsw"
- [(unspec:SI [(match_operand:SI 0 "immediate_operand" "i")]
+ [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
UNSPEC_BUILTIN_CLRPSW)
(clobber (reg:CC CC_REG))]
""
;; Set Processor Status Word
(define_insn "setpsw"
- [(unspec:SI [(match_operand:SI 0 "immediate_operand" "i")]
+ [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i")]
UNSPEC_BUILTIN_SETPSW)
(clobber (reg:CC CC_REG))]
""
;; Move from control register
(define_insn "mvfc"
[(set (match_operand:SI 0 "register_operand" "=r")
- (unspec:SI [(match_operand:SI 1 "immediate_operand" "i")]
+ (unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "i")]
UNSPEC_BUILTIN_MVFC))]
""
"mvfc\t%C1, %0"
;; Move to control register
(define_insn "mvtc"
- [(unspec:SI [(match_operand:SI 0 "immediate_operand" "i,i")
+ [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "i,i")
(match_operand:SI 1 "nonmemory_operand" "r,i")]
UNSPEC_BUILTIN_MVTC)]
""
;; Move to interrupt priority level
(define_insn "mvtipl"
- [(unspec:SI [(match_operand:SI 0 "immediate_operand" "Uint04")]
+ [(unspec_volatile:SI [(match_operand:SI 0 "immediate_operand" "Uint04")]
UNSPEC_BUILTIN_MVTIPL)]
""
"mvtipl\t%0"