[bazel] Port 7a5cb15ea6facd82756adafae76d60f36a0b60fd

diff --git a/utils/bazel/llvm-project-overlay/clang/BUILD.bazel b/utils/bazel/llvm-project-overlay/clang/BUILD.bazel
index b9a8179..ead04c9 100644 (file)
--- a/utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+++ b/utils/bazel/llvm-project-overlay/clang/BUILD.bazel
@@ -235,6 +235,19 @@ gentbl(
 )
 
 gentbl(
+    name = "basic_riscv_vector_builtin_sema_gen",
+    tbl_outs = [(
+        "-gen-riscv-vector-builtin-sema",
+        "include/clang/Basic/riscv_vector_builtin_sema.inc",
+    )],
+    tblgen = ":clang-tblgen",
+    td_file = "include/clang/Basic/riscv_vector.td",
+    td_srcs = [
+        "include/clang/Basic/riscv_vector.td",
+    ],
+)
+
+gentbl(
     name = "basic_arm_cde_gen",
     tbl_outs = [(
         "-gen-arm-cde-builtin-def",
@@ -866,10 +879,12 @@ cc_library(
         ":basic_arm_cde_sema_gen",
         ":basic_arm_sve_builtins_gen",
         ":basic_arm_sve_sema_rangechecks_gen",
+        ":basic_riscv_vector_builtin_sema_gen",
         ":edit",
         ":lex",
         ":libsema_openclbuiltins_inc_gen",
         ":sema_attr_gen",
+        ":support",
         ":type_nodes_gen",
         "//llvm:AllTargetsAsmParsers",
         "//llvm:AllTargetsCodeGens",