MIPS is always multi-arch enabled.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index e5f23c2..a4b4046 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,12 +1,33 @@
+Thu Jun  8 15:26:44 2000  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * config/mips/tm-mips.h (GDB_MULTI_ARCH): Define as 1.
+       (CALL_DUMMY, TARGET_BYTE_ORDER_SELECTABLE_P,
+       COERCE_FLOAT_TO_DOUBLE): Delete.
+       * config/mips/tm-vr5000el.h, config/mips/tm-vr5000.h,
+       config/mips/tm-vr4xxxel.h, config/mips/tm-vr4xxx.h,
+       config/mips/tm-vr4100.h, config/mips/tm-tx39l.h
+       config/mips/tm-tx39.h, config/mips/tm-irix5.h: Delete
+       GDB_MULTI_ARCH.
+
+       * config/mips/tm-mips64.h (TARGET_LONG_BIT, TARGET_LONG_LONG_BIT,
+       TARGET_PTR_BIT): Delete definitions.
+       * config/mips/tm-vr5000el.h, config/mips/tm-vr5000.h,
+       config/mips/tm-tx39l.h, config/mips/tm-vr4100.h,
+       config/mips/tm-tx39.h: Delete definition of MIPS_EABI.
+       * mips-tdep.c (mips_gdbarch_init): Use the ISA to determine the
+       ABI.  If all else fails, assume O32.
+
+       * TODO, NEWS: Update.  Mention MIPS is multi-arch.
+
 Thu Jun  8 14:23:12 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * config/mips/tm-vr4xxxel.h, config/mips/tm-vr4xxx.h,
        config/mips/tm-vr4100.h, config/mips/tm-tx39l.h,
        config/mips/tm-tx39.h: Delete definition of
-       MIPS_DEFAULT_FPU. Enable multi-arch.
+       MIPS_DEFAULT_FPU_TYPE. Enable multi-arch.
        * mips-tdep.c: (mips_gdbarch_init): The bfd_mach_mips3900 has no
-       FPU.
-       
+       FPU.  bfd_mach_mips4650 FPU is single precision.
+
        * config/mips/tm-mips.h (MIPS_FPU_SINGLE_REGSIZE): 
        (MIPS_FPU_DOUBLE_REGSIZE): Move from here.
        * mips-tdep.c: To here.  Change to an enum.

diff --git a/gdb/NEWS b/gdb/NEWS
index 4f68e81..2913f56 100644 (file)
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -8,7 +8,20 @@
 Alpha FreeBSD                                  alpha*-*-freebsd*
 x86 FreeBSD 3.x and 4.x                                i[3456]86*-freebsd[34]*
 
-FreeBSD versions before 2.2 are no longer supported.
+* New targets
+
+* OBSOLETE configurations
+
+x86 FreeBSD before 2.2                         i[3456]86*-freebsd{1,2.[01]}*, 
+
+* Deleted configurations
+
+* Other news:
+
+* All MIPS configurations are multi-arched.
+
+Multi-arch support is enabled for all MIPS configurations.
+
 
 *** Changes in GDB 5.0:
 

diff --git a/gdb/TODO b/gdb/TODO
index 1b44dd1..7c47440 100644 (file)
--- a/gdb/TODO
+++ b/gdb/TODO
@@ -330,6 +330,10 @@ See also ``Fix implementation of  ``target xxx''.'' below.
 
 --
 
+IRIX 3.x support is probably broken.
+
+--
+
                        New Features and Fixes
                        ======================
 
@@ -971,6 +975,12 @@ name.
 
 --
 
+Make MIPS pure multi-arch.
+
+It is only at the multi-arch enabled stage.
+
+--
+
 Truly multi-arch.
 
 Enable the code to recognize --enable-targets=.... like BINUTILS does.

diff --git a/gdb/config/mips/tm-irix5.h b/gdb/config/mips/tm-irix5.h
index 19b8dbe..25bbae5 100644 (file)
--- a/gdb/config/mips/tm-irix5.h
+++ b/gdb/config/mips/tm-irix5.h
@@ -18,17 +18,6 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-/* If we're being built for n32, enable multi-arch. */
-/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
-   _MIPS_SIM in a tm-*.h file is simply wrong!  Those are
-   host-dependant macros (provided by /usr/include) and stop any
-   chance of the target being cross compiled */
-#if 0 && defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
-/* FIXME: Don't enable multi-arch for IRIX/n32.  The test
-   ``gdb.base/corefile.exp: up in corefile.exp'' fails.  */
-#define GDB_MULTI_ARCH 1
-#endif
-
 #include "mips/tm-irix3.h"
 
 /* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and

diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index ff95113..3f007cd 100644 (file)
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -24,6 +24,8 @@
 #ifndef TM_MIPS_H
 #define TM_MIPS_H 1
 
+#define GDB_MULTI_ARCH 1
+
 struct frame_info;
 struct symbol;
 struct type;
@@ -407,10 +409,6 @@ extern void mips_push_dummy_frame (void);
 #define POP_FRAME              mips_pop_frame()
 extern void mips_pop_frame (void);
 
-#if !GDB_MULTI_ARCH
-#define CALL_DUMMY { 0 }
-#endif
-
 #define CALL_DUMMY_START_OFFSET (0)
 
 #define CALL_DUMMY_BREAKPOINT_OFFSET (0)
@@ -487,22 +485,6 @@ extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
 
 #define ECOFF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
 
-#if !GDB_MULTI_ARCH
-/* If the current gcc for for this target does not produce correct debugging
-   information for float parameters, both prototyped and unprototyped, then
-   define this macro.  This forces gdb to  always assume that floats are
-   passed as doubles and then converted in the callee.
-
-   For the mips chip, it appears that the debug info marks the parameters as
-   floats regardless of whether the function is prototyped, but the actual
-   values are passed as doubles for the non-prototyped case and floats for
-   the prototyped case.  Thus we choose to make the non-prototyped case work
-   for C and break the prototyped case, since the non-prototyped case is
-   probably much more common.  (FIXME). */
-
-#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (current_language -> la_language == language_c)
-#endif
-
 /* Select the default mips disassembler */
 
 #define TM_PRINT_INSN_MACH 0
@@ -579,9 +561,3 @@ extern void mips_set_processor_type_command (char *, int);
 /* MIPS sign extends addresses */
 #define POINTER_TO_ADDRESS(TYPE,BUF) (signed_pointer_to_address (TYPE, BUF))
 #define ADDRESS_TO_POINTER(TYPE,BUF,ADDR) (address_to_signed_pointer (TYPE, BUF, ADDR))
-
-
-/* MIPS is always bi-endian */
-#if !GDB_MULTI_ARCH
-#define TARGET_BYTE_ORDER_SELECTABLE_P 1
-#endif

diff --git a/gdb/config/mips/tm-mips64.h b/gdb/config/mips/tm-mips64.h
index 0031695..f13fa7a 100644 (file)
--- a/gdb/config/mips/tm-mips64.h
+++ b/gdb/config/mips/tm-mips64.h
@@ -35,21 +35,5 @@
 #define OP_LDFPR 065           /* ldc1 */
 #define OP_LDGPR 067           /* ld */
 
-#if defined(MIPS_EABI) && (MIPS_EABI != 0)
-/* Define sizes for 64-bit data types, allow specific targets to override
-   these values.  Doing so may violate the strict EABI, but it's necessary
-   for some MIPS III and MIPS IV machines that want 64bit longs, but 32bit
-   pointers.  */
-#ifndef TARGET_LONG_BIT
-#define TARGET_LONG_BIT      64
-#endif
-#ifndef TARGET_LONG_LONG_BIT
-#define TARGET_LONG_LONG_BIT 64
-#endif
-#ifndef TARGET_PTR_BIT
-#define TARGET_PTR_BIT       64
-#endif
-#endif /* MIPS_EABI */
-
 /* Get the basic MIPS definitions.  */
 #include "tm-mips.h"

diff --git a/gdb/config/mips/tm-tx39.h b/gdb/config/mips/tm-tx39.h
index c1d9cf7..c4cc851 100644 (file)
--- a/gdb/config/mips/tm-tx39.h
+++ b/gdb/config/mips/tm-tx39.h
@@ -17,9 +17,6 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-#define GDB_MULTI_ARCH 1
-#define MIPS_EABI 1
-
 #include "mips/tm-bigmips.h"
 
 #undef  MIPS_REGISTER_NAMES

diff --git a/gdb/config/mips/tm-tx39l.h b/gdb/config/mips/tm-tx39l.h
index 802e41b..f8f942e 100644 (file)
--- a/gdb/config/mips/tm-tx39l.h
+++ b/gdb/config/mips/tm-tx39l.h
@@ -17,9 +17,6 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-#define GDB_MULTI_ARCH 1
-#define MIPS_EABI 1
-
 #include "mips/tm-mips.h"
 
 #undef  MIPS_REGISTER_NAMES

diff --git a/gdb/config/mips/tm-vr4100.h b/gdb/config/mips/tm-vr4100.h
index faf0a96..36d5bce 100644 (file)
--- a/gdb/config/mips/tm-vr4100.h
+++ b/gdb/config/mips/tm-vr4100.h
@@ -17,7 +17,4 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-#define MIPS_EABI 1
-#define TARGET_PTR_BIT 64
-
 #include "mips/tm-bigmips64.h"

diff --git a/gdb/config/mips/tm-vr4xxx.h b/gdb/config/mips/tm-vr4xxx.h
index 7d2a78a..36d5bce 100644 (file)
--- a/gdb/config/mips/tm-vr4xxx.h
+++ b/gdb/config/mips/tm-vr4xxx.h
@@ -17,6 +17,4 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-#define GDB_MULTI_ARCH 1
-
 #include "mips/tm-bigmips64.h"

diff --git a/gdb/config/mips/tm-vr4xxxel.h b/gdb/config/mips/tm-vr4xxxel.h
index 1347af7..5193747 100644 (file)
--- a/gdb/config/mips/tm-vr4xxxel.h
+++ b/gdb/config/mips/tm-vr4xxxel.h
@@ -17,6 +17,4 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-#define GDB_MULTI_ARCH 1
-
 #include "mips/tm-mips64.h"

diff --git a/gdb/config/mips/tm-vr5000.h b/gdb/config/mips/tm-vr5000.h
index 1bb91ba..9f1fbba 100644 (file)
--- a/gdb/config/mips/tm-vr5000.h
+++ b/gdb/config/mips/tm-vr5000.h
@@ -17,7 +17,4 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-#define GDB_MULTI_ARCH 1
-#define MIPS_EABI 1
-
 #include "mips/tm-bigmips64.h"

diff --git a/gdb/config/mips/tm-vr5000el.h b/gdb/config/mips/tm-vr5000el.h
index a93e728..e20adaa 100644 (file)
--- a/gdb/config/mips/tm-vr5000el.h
+++ b/gdb/config/mips/tm-vr5000el.h
@@ -17,7 +17,4 @@
    Foundation, Inc., 59 Temple Place - Suite 330,
    Boston, MA 02111-1307, USA.  */
 
-#define GDB_MULTI_ARCH 1
-#define MIPS_EABI 1
-
 #include "mips/tm-mips64.h"

diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 971b04a..fd77607 100644 (file)
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -1,5 +1,8 @@
 /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger.
-   Copyright 1988-1999, Free Software Foundation, Inc.
+
+   Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
+   1997, 1998, 1999, 2000, Free Software Foundation, Inc.
+
    Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
    and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
 
@@ -3868,10 +3871,28 @@ mips_gdbarch_init (info, arches)
       mips_abi = MIPS_ABI_UNKNOWN;
       break;
     }
+  /* Try the architecture for any hint of the corect ABI */
+  if (mips_abi == MIPS_ABI_UNKNOWN
+      && info.bfd_arch_info != NULL
+      && info.bfd_arch_info->arch == bfd_arch_mips)
+    {
+      switch (info.bfd_arch_info->mach)
+       {
+       case bfd_mach_mips3900:
+         mips_abi = MIPS_ABI_EABI32;
+         break;
+       case bfd_mach_mips4100:
+       case bfd_mach_mips5000:
+         mips_abi = MIPS_ABI_EABI64;
+         break;
+       }
+    }
 #ifdef MIPS_DEFAULT_ABI
   if (mips_abi == MIPS_ABI_UNKNOWN)
     mips_abi = MIPS_DEFAULT_ABI;
 #endif
+  if (mips_abi == MIPS_ABI_UNKNOWN)
+    mips_abi = MIPS_ABI_O32;
 
   /* try to find a pre-existing architecture */
   for (arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -4043,6 +4064,9 @@ mips_gdbarch_init (info, arches)
       case bfd_mach_mips4111:
        tdep->mips_fpu_type = MIPS_FPU_NONE;
        break;
+      case bfd_mach_mips4650:
+       tdep->mips_fpu_type = MIPS_FPU_SINGLE;
+       break;
       default:
        tdep->mips_fpu_type = MIPS_FPU_DOUBLE;
        break;