],
"capabilities" : [ "FPGAKernelAttributesINTEL" ],
"version" : "None"
+ },
+ {
+ "enumerant" : "NamedBarrierCountINTEL",
+ "value" : 6417,
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'Barrier Count'" }
+ ],
+ "capabilities" : [ "VectorComputeINTEL" ],
+ "extensions" : [ "SPV_INTEL_vector_compute" ],
+ "version" : "None"
}
]
},
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
+ NamedBarrierCountINTEL = 6417,
}
public enum StorageClass
SpvExecutionModeNoGlobalOffsetINTEL = 5895,
SpvExecutionModeNumSIMDWorkitemsINTEL = 5896,
SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
+ SpvExecutionModeNamedBarrierCountINTEL = 6417,
SpvExecutionModeMax = 0x7fffffff,
} SpvExecutionMode;
ExecutionModeNoGlobalOffsetINTEL = 5895,
ExecutionModeNumSIMDWorkitemsINTEL = 5896,
ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
+ ExecutionModeNamedBarrierCountINTEL = 6417,
ExecutionModeMax = 0x7fffffff,
};
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
+ NamedBarrierCountINTEL = 6417,
Max = 0x7fffffff,
};
"MaxWorkDimINTEL": 5894,
"NoGlobalOffsetINTEL": 5895,
"NumSIMDWorkitemsINTEL": 5896,
- "SchedulerTargetFmaxMhzINTEL": 5903
+ "SchedulerTargetFmaxMhzINTEL": 5903,
+ "NamedBarrierCountINTEL": 6417
}
},
{
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
+ NamedBarrierCountINTEL = 6417,
},
StorageClass = {
'NoGlobalOffsetINTEL' : 5895,
'NumSIMDWorkitemsINTEL' : 5896,
'SchedulerTargetFmaxMhzINTEL' : 5903,
+ 'NamedBarrierCountINTEL' : 6417,
},
'StorageClass' : {
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
+ NamedBarrierCountINTEL = 6417,
}
enum StorageClass : uint