drm/amd/display: Limit DCN to x86 arch
authorHarry Wentland <harry.wentland@amd.com>
Fri, 19 May 2017 02:13:19 +0000 (22:13 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:07:32 +0000 (18:07 -0400)
DCN bw calcs currently rely on the following gcc options:
  -mhard-float -msse -mpreferred-stack-boundary=4

We probably shouldn't really try building this on architectures
other than x86.

CC: Alex Deucher <Alexander.Deucher@amd.com>
CC: Christian König <christian.koenig@amd.com>
CC: Michel Dänzer <michel.daenzer@amd.com>
CC: Tony Cheng <Tony.Cheng@amd.com>
CC: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/Kconfig
drivers/gpu/drm/amd/display/dc/calcs/Makefile

index 5c3bb35..89fc8e7 100644 (file)
@@ -19,7 +19,7 @@ config DRM_AMD_DC_PRE_VEGA
 
 config DRM_AMD_DC_DCN1_0
         bool "DCN 1.0 Raven family"
-        depends on DRM_AMD_DC
+        depends on DRM_AMD_DC && X86
         help
             Choose this option if you want to have
             RV family for display engine
index a095472..2e4ce09 100644 (file)
@@ -3,9 +3,11 @@
 # It calculates Bandwidth and Watermarks values for HW programming
 #
 
+ifeq ($(ARCH),x86)
 CFLAGS_dcn_calcs.o := -mhard-float -msse -mpreferred-stack-boundary=4
 CFLAGS_dcn_calc_auto.o := -mhard-float -msse -mpreferred-stack-boundary=4
 CFLAGS_dcn_calc_math.o := -mhard-float -msse -mpreferred-stack-boundary=4
+endif
 
 BW_CALCS = dce_calcs.o bw_fixed.o custom_float.o