iommu/rockchip: Fix TLB flush of secondary IOMMUs

Due to the bug in current code, only first IOMMU has the TLB lines
flushed in rk_iommu_zap_lines. This patch fixes the inner loop to
execute for all IOMMUs and properly flush the TLB.

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 7130d92..c3df53e 100644 (file)
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -274,19 +274,21 @@ static void rk_iommu_base_command(void __iomem *base, u32 command)
 {
        writel(command, base + RK_MMU_COMMAND);
 }
-static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova,
+static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova_start,
                               size_t size)
 {
        int i;
-
-       dma_addr_t iova_end = iova + size;
+       dma_addr_t iova_end = iova_start + size;
        /*
         * TODO(djkurtz): Figure out when it is more efficient to shootdown the
         * entire iotlb rather than iterate over individual iovas.
         */
-       for (i = 0; i < iommu->num_mmu; i++)
-               for (; iova < iova_end; iova += SPAGE_SIZE)
+       for (i = 0; i < iommu->num_mmu; i++) {
+               dma_addr_t iova;
+
+               for (iova = iova_start; iova < iova_end; iova += SPAGE_SIZE)
                        rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova);
+       }
 }
 
 static bool rk_iommu_is_stall_active(struct rk_iommu *iommu)