drm/i915/selftests: Ensure we don't clamp a random offset to 32b
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 10 Jul 2019 16:14:13 +0000 (17:14 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 11 Jul 2019 09:06:37 +0000 (10:06 +0100)
Specify that we do want a 64b value for sizeof(u32) as we want to
compute the mask of the upper 62bits.

v2: Use round_down() for automatic type promotion

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190710161413.7115-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
drivers/gpu/drm/i915/gt/intel_gpu_commands.h

index 3abe15a..695bfb1 100644 (file)
@@ -1539,7 +1539,7 @@ static int igt_vm_isolation(void *arg)
 
                        div64_u64_rem(i915_prandom_u64_state(&prng),
                                      vm_total, &offset);
-                       offset &= -sizeof(u32);
+                       offset = round_down(offset, alignof_dword);
                        offset += I915_GTT_PAGE_SIZE;
 
                        err = write_to_scratch(ctx_a, engine,
index eec31e3..69f3473 100644 (file)
@@ -8,6 +8,13 @@
 #define _INTEL_GPU_COMMANDS_H_
 
 /*
+ * Target address alignments required for GPU access e.g.
+ * MI_STORE_DWORD_IMM.
+ */
+#define alignof_dword 4
+#define alignof_qword 8
+
+/*
  * Instruction field definitions used by the command parser
  */
 #define INSTR_CLIENT_SHIFT      29