GCC-4 fix for AMD-64
authorGuillaume Poirier <gpoirier@mplayerhq.hu>
Sat, 18 Jun 2005 20:16:19 +0000 (20:16 +0000)
committerGuillaume Poirier <gpoirier@mplayerhq.hu>
Sat, 18 Jun 2005 20:16:19 +0000 (20:16 +0000)
Warning: high cola-affinity here)

Originally committed as revision 15750 to svn://svn.mplayerhq.hu/mplayer/trunk/postproc

postproc/swscale_template.c

index 99f756e..ff7f46f 100644 (file)
@@ -765,14 +765,14 @@ static inline void RENAME(yuv2yuvX)(SwsContext *c, int16_t *lumFilter, int16_t *
                asm volatile(
                                YSCALEYUV2YV12X(0, CHR_MMX_FILTER_OFFSET)
                                :: "r" (&c->redDither),
-                               "r" (uDest), "m" ((long)chrDstW)
+                               "r" (uDest), "p" ((long)chrDstW)
                                : "%"REG_a, "%"REG_d, "%"REG_S
                        );
 
                asm volatile(
                                YSCALEYUV2YV12X(4096, CHR_MMX_FILTER_OFFSET)
                                :: "r" (&c->redDither),
-                               "r" (vDest), "m" ((long)chrDstW)
+                               "r" (vDest), "p" ((long)chrDstW)
                                : "%"REG_a, "%"REG_d, "%"REG_S
                        );
        }
@@ -780,7 +780,7 @@ static inline void RENAME(yuv2yuvX)(SwsContext *c, int16_t *lumFilter, int16_t *
        asm volatile(
                        YSCALEYUV2YV12X(0, LUM_MMX_FILTER_OFFSET)
                        :: "r" (&c->redDither),
-                          "r" (dest), "m" ((long)dstW)
+                          "r" (dest), "p" ((long)dstW)
                        : "%"REG_a, "%"REG_d, "%"REG_S
                );
 #else
@@ -2547,7 +2547,7 @@ FUNNY_UV_CODE
                "cmp %2, %%"REG_a"              \n\t"
                " jb 1b                         \n\t"
 
-               :: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
+               :: "m" (src1), "m" (dst), "p" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
                "r" (src2)
                : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
                );