nvc0: bump sched data member to 32-bits

SM50 backend requires 21 bits per instruction, not 8.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
index 8872cfb..f082f85 100644 (file)
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
@@ -792,7 +792,7 @@ public:
    int8_t flagsDef;
    int8_t flagsSrc;
 
-   uint8_t sched; // scheduling data (NOTE: maybe move to separate storage)
+   uint32_t sched; // scheduling data (NOTE: maybe move to separate storage)
 
    BasicBlock *bb;