arm64: dts: qcom: sc7180: Update Q6V5 MSS node
authorSibi Sankar <sibis@codeaurora.org>
Tue, 21 Apr 2020 14:32:28 +0000 (20:02 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Mon, 11 May 2020 19:31:51 +0000 (12:31 -0700)
Add TCSR node and update MSS node to support MSA based Modem boot on
SC7180 SoCs.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200421143228.8981-8-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sc7180-idp.dts
arch/arm64/boot/dts/qcom/sc7180.dtsi

index c7c1eff..4e9149d 100644 (file)
        status = "okay";
 };
 
+&remoteproc_mpss {
+       status = "okay";
+       compatible = "qcom,sc7180-mss-pil";
+       iommus = <&apps_smmu 0x460 0x1>, <&apps_smmu 0x444 0x3>;
+       memory-region = <&mba_mem &mpss_mem>;
+};
+
 &sdhc_1 {
        status = "okay";
 
index e795f3f..2fafc40 100644 (file)
                        reg = <0 0x01f40000 0 0x40000>;
                };
 
+               tcsr_regs: syscon@1fc0000 {
+                       compatible = "syscon";
+                       reg = <0 0x01fc0000 0 0x40000>;
+               };
+
                tlmm: pinctrl@3500000 {
                        compatible = "qcom,sc7180-pinctrl";
                        reg = <0 0x03500000 0 0x300000>,
 
                remoteproc_mpss: remoteproc@4080000 {
                        compatible = "qcom,sc7180-mpss-pas";
-                       reg = <0 0x04080000 0 0x4040>;
+                       reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
+                       reg-names = "qdsp6", "rmb";
 
                        interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
                                              <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
                        interrupt-names = "wdog", "fatal", "ready", "handover",
                                          "stop-ack", "shutdown-ack";
 
-                       clocks = <&rpmhcc RPMH_CXO_CLK>;
-                       clock-names = "xo";
+                       clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+                                <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+                                <&gcc GCC_MSS_NAV_AXI_CLK>,
+                                <&gcc GCC_MSS_SNOC_AXI_CLK>,
+                                <&gcc GCC_MSS_MFAB_AXIS_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "iface", "bus", "nav", "snoc_axi",
+                                     "mnoc_axi", "xo";
 
                        power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>,
                                        <&rpmhpd SC7180_CX>,
+                                       <&rpmhpd SC7180_MX>,
                                        <&rpmhpd SC7180_MSS>;
-                       power-domain-names = "load_state", "cx", "mss";
+                       power-domain-names = "load_state", "cx", "mx", "mss";
 
                        memory-region = <&mpss_mem>;
 
                        qcom,smem-states = <&modem_smp2p_out 0>;
                        qcom,smem-state-names = "stop";
 
+                       resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+                                <&pdc_reset PDC_MODEM_SYNC_RESET>;
+                       reset-names = "mss_restart", "pdc_reset";
+
+                       qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
+                       qcom,spare-regs = <&tcsr_regs 0xb3e4>;
+
                        status = "disabled";
 
                        glink-edge {