ARM: sunxi: Add the missing clocks to the pinctrl nodes
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 19 Oct 2016 09:15:27 +0000 (11:15 +0200)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 22 Nov 2016 14:34:08 +0000 (15:34 +0100)
The pin controllers also use the two oscillators for debouncing. Add them
to the DTs.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
arch/arm/boot/dts/sun4i-a10.dtsi
arch/arm/boot/dts/sun5i.dtsi
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/boot/dts/sun8i-a23-a33.dtsi
arch/arm/boot/dts/sun8i-h3.dtsi
arch/arm/boot/dts/sun9i-a80.dtsi

index 7e7dfc2..b14a428 100644 (file)
                        compatible = "allwinner,sun4i-a10-pinctrl";
                        reg = <0x01c20800 0x400>;
                        interrupts = <28>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
index b4ccee8..b0fca4e 100644 (file)
                pio: pinctrl@01c20800 {
                        reg = <0x01c20800 0x400>;
                        interrupts = <28>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
index ef24669..2b26175 100644 (file)
                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_APB1_PIO>;
+                       clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_rst 0>;
                        gpio-controller;
                        interrupt-controller;
index 94cf5a1..f7db067 100644 (file)
                        compatible = "allwinner,sun7i-a20-pinctrl";
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
index 300a1bd..e4991a7 100644 (file)
                        /* compatible gets set in SoC specific dtsi file */
                        reg = <0x01c20800 0x400>;
                        /* interrupts get set in SoC specific dtsi file */
-                       clocks = <&ccu CLK_BUS_PIO>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
                        compatible = "allwinner,sun8i-a23-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_rst 0>;
                        gpio-controller;
                        interrupt-controller;
index c38b028..3c6596f 100644 (file)
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_PIO>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupt-controller;
                        compatible = "allwinner,sun8i-h3-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_reset 0>;
                        gpio-controller;
                        #gpio-cells = <3>;
index ab6a221..979ad1a 100644 (file)
                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 5>;
+                       clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
                        #interrupt-cells = <3>;
                        reg = <0x08002c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apbs_gates 0>;
+                       clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
                        resets = <&apbs_rst 0>;
                        gpio-controller;
                        interrupt-controller;