drm/ttm: add kerneldoc for enum ttm_caching

Briefly describe what this is all about.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210908132933.3269-4-christian.koenig@amd.com

diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst
index 6b7717af4f88b9b946098f27208f652bc734cc81..f22c9f9a2c0e1cc53c989860ec67c921b029352c 100644 (file)
--- a/Documentation/gpu/drm-mm.rst
+++ b/Documentation/gpu/drm-mm.rst
@@ -31,6 +31,9 @@ The Translation Table Manager (TTM)
 .. kernel-doc:: drivers/gpu/drm/ttm/ttm_module.c
    :doc: TTM
 
+.. kernel-doc:: include/drm/ttm/ttm_caching.h
+   :internal:
+
 The Graphics Execution Manager (GEM)
 ====================================
 

diff --git a/include/drm/ttm/ttm_caching.h b/include/drm/ttm/ttm_caching.h
index 3c9dd65f5aaff854ae4bfa36e51bb3d37cfe4a32..235a743d90e1467c6b48f53734e53f931e34be0d 100644 (file)
--- a/include/drm/ttm/ttm_caching.h
+++ b/include/drm/ttm/ttm_caching.h
@@ -27,9 +27,26 @@
 
 #define TTM_NUM_CACHING_TYPES  3
 
+/**
+ * enum ttm_caching - CPU caching and BUS snooping behavior.
+ */
 enum ttm_caching {
+       /**
+        * @ttm_uncached: Most defensive option for device mappings,
+        * don't even allow write combining.
+        */
        ttm_uncached,
+
+       /**
+        * @ttm_write_combined: Don't cache read accesses, but allow at least
+        * writes to be combined.
+        */
        ttm_write_combined,
+
+       /**
+        * @ttm_cached: Fully cached like normal system memory, requires that
+        * devices snoop the CPU cache on accesses.
+        */
        ttm_cached
 };