pci_register_bar (&s->dev, 0, 256 * 4, PCI_BASE_ADDRESS_SPACE_IO,
ac97_map);
pci_register_bar (&s->dev, 1, 64 * 4, PCI_BASE_ADDRESS_SPACE_IO, ac97_map);
- vmstate_register (0, &vmstate_ac97, s);
qemu_register_reset (ac97_on_reset, s);
AUD_register_card ("ac97", &s->card);
ac97_on_reset (s);
.qdev.name = "AC97",
.qdev.desc = "Intel 82801AA AC97 Audio",
.qdev.size = sizeof (AC97LinkState),
+ .qdev.vmsd = &vmstate_ac97,
.init = ac97_initfn,
};
pci_register_bar((PCIDevice *)d, 1, CIRRUS_PNPMMIO_SIZE,
PCI_BASE_ADDRESS_SPACE_MEMORY, cirrus_pci_mmio_map);
}
- vmstate_register(0, &vmstate_pci_cirrus_vga, d);
/* ROM BIOS */
rom_add_vga(VGABIOS_CIRRUS_FILENAME);
static PCIDeviceInfo cirrus_vga_info = {
.qdev.name = "Cirrus VGA",
.qdev.size = sizeof(PCICirrusVGAState),
+ .qdev.vmsd = &vmstate_pci_cirrus_vga,
.init = pci_cirrus_vga_initfn,
.config_write = pci_cirrus_write_config,
};
DMA_register_channel (s->dma, cs_dma_read, s);
- vmstate_register (0, &vmstate_cs4231a, s);
qemu_register_reset (cs_reset, s);
cs_reset (s);
.qdev.name = "cs4231a",
.qdev.desc = "Crystal Semiconductor CS4231A",
.qdev.size = sizeof (CSState),
+ .qdev.vmsd = &vmstate_cs4231a,
.init = cs4231a_initfn,
.qdev.props = (Property[]) {
DEFINE_PROP_HEX32 ("iobase", CSState, port, 0x534),
cpu_unregister_io_memory(d->mmio_index);
qemu_del_vlan_client(&d->nic->nc);
- vmstate_unregister(&vmstate_e1000, d);
return 0;
}
qemu_format_nic_info_str(&d->nic->nc, macaddr);
- vmstate_register(-1, &vmstate_e1000, d);
-
if (!pci_dev->qdev.hotplugged) {
static int loaded = 0;
if (!loaded) {
.qdev.desc = "Intel Gigabit Ethernet",
.qdev.size = sizeof(E1000State),
.qdev.reset = qdev_e1000_reset,
+ .qdev.vmsd = &vmstate_e1000,
.init = pci_e1000_init,
.exit = pci_e1000_uninit,
.qdev.props = (Property[]) {
c[0x3f] = 0x80;
pci_register_bar (&s->dev, 0, 256, PCI_BASE_ADDRESS_SPACE_IO, es1370_map);
- vmstate_register (0, &vmstate_es1370, s);
qemu_register_reset (es1370_on_reset, s);
AUD_register_card ("es1370", &s->card);
.qdev.name = "ES1370",
.qdev.desc = "ENSONIQ AudioPCI ES1370",
.qdev.size = sizeof (ES1370State),
+ .qdev.vmsd = &vmstate_es1370,
.init = es1370_initfn,
};
AUD_set_active_out (s->voice, 1);
- vmstate_register (0, &vmstate_gus, s);
return 0;
}
.qdev.name = "gus",
.qdev.desc = "Gravis Ultrasound GF1",
.qdev.size = sizeof (GUSState),
+ .qdev.vmsd = &vmstate_gus,
.init = gus_initfn,
.qdev.props = (Property[]) {
DEFINE_PROP_UINT32 ("freq", GUSState, freq, 44100),
{
PCNetState *d = DO_UPCAST(NICState, nc, nc)->opaque;
- vmstate_unregister(&vmstate_pcnet, d);
pcnet_common_cleanup(d);
}
.cleanup = lance_cleanup,
};
+static const VMStateDescription vmstate_lance = {
+ .name = "pcnet",
+ .version_id = 3,
+ .minimum_version_id = 2,
+ .minimum_version_id_old = 2,
+ .fields = (VMStateField []) {
+ VMSTATE_STRUCT(state, SysBusPCNetState, 0, vmstate_pcnet, PCNetState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static int lance_init(SysBusDevice *dev)
{
SysBusPCNetState *d = FROM_SYSBUS(SysBusPCNetState, dev);
s->phys_mem_read = ledma_memory_read;
s->phys_mem_write = ledma_memory_write;
-
- vmstate_register(-1, &vmstate_pcnet, d);
return pcnet_common_init(&dev->qdev, s, &net_lance_info);
}
.qdev.name = "lance",
.qdev.size = sizeof(SysBusPCNetState),
.qdev.reset = lance_reset,
+ .qdev.vmsd = &vmstate_lance,
.qdev.props = (Property[]) {
DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
lm_kbd_reset(s);
qemu_register_reset((void *) lm_kbd_reset, s);
- vmstate_register(-1, &vmstate_lm_kbd, s);
return 0;
}
static I2CSlaveInfo lm8323_info = {
.qdev.name = "lm8323",
.qdev.size = sizeof(LM823KbdState),
+ .qdev.vmsd = &vmstate_lm_kbd,
.init = lm8323_init,
.event = lm_i2c_event,
.recv = lm_i2c_rx,
if (!dev->qdev.hotplugged) {
scsi_bus_legacy_handle_cmdline(&s->bus);
}
- vmstate_register(-1, &vmstate_lsi_scsi, s);
return 0;
}
.qdev.name = "lsi53c895a",
.qdev.alias = "lsi",
.qdev.size = sizeof(LSIState),
+ .qdev.vmsd = &vmstate_lsi_scsi,
.init = lsi_scsi_init,
.exit = lsi_scsi_uninit,
};
max7310_reset(&s->i2c);
- vmstate_register(-1, &vmstate_max7310, s);
return 0;
}
static I2CSlaveInfo max7310_info = {
.qdev.name = "max7310",
.qdev.size = sizeof(MAX7310State),
+ .qdev.vmsd = &vmstate_max7310,
.init = max7310_init,
.event = max7310_event,
.recv = max7310_rx,
.cleanup = isa_ne2000_cleanup,
};
+const VMStateDescription vmstate_isa_ne2000 = {
+ .name = "ne2000",
+ .version_id = 2,
+ .minimum_version_id = 0,
+ .minimum_version_id_old = 0,
+ .fields = (VMStateField []) {
+ VMSTATE_STRUCT(ne2000, ISANE2000State, 0, vmstate_ne2000, NE2000State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static int isa_ne2000_initfn(ISADevice *dev)
{
ISANE2000State *isa = DO_UPCAST(ISANE2000State, dev, dev);
dev->qdev.info->name, dev->qdev.id, s);
qemu_format_nic_info_str(&s->nic->nc, s->c.macaddr.a);
- vmstate_register(-1, &vmstate_ne2000, s);
return 0;
}
}
}
- vmstate_register(-1, &vmstate_pci_ne2000, d);
return 0;
}
PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev);
NE2000State *s = &d->ne2000;
- vmstate_unregister(&vmstate_pci_ne2000, s);
qemu_del_vlan_client(&s->nic->nc);
return 0;
}
static PCIDeviceInfo ne2000_info = {
.qdev.name = "ne2k_pci",
.qdev.size = sizeof(PCINE2000State),
+ .qdev.vmsd = &vmstate_pci_ne2000,
.init = pci_ne2000_init,
.exit = pci_ne2000_exit,
.qdev.props = (Property[]) {
KBDState kbd;
} ISAKBDState;
+const VMStateDescription vmstate_kbd_isa = {
+ .name = "pckbd",
+ .version_id = 3,
+ .minimum_version_id = 3,
+ .minimum_version_id_old = 3,
+ .fields = (VMStateField []) {
+ VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static int i8042_initfn(ISADevice *dev)
{
KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
isa_init_irq(dev, &s->irq_kbd, 1);
isa_init_irq(dev, &s->irq_mouse, 12);
- vmstate_register(0, &vmstate_kbd, s);
register_ioport_read(0x60, 1, 1, kbd_read_data, s);
register_ioport_write(0x60, 1, 1, kbd_write_data, s);
register_ioport_read(0x64, 1, 1, kbd_read_status, s);
static ISADeviceInfo i8042_info = {
.qdev.name = "i8042",
.qdev.size = sizeof(ISAKBDState),
+ .qdev.vmsd = &vmstate_kbd_isa,
.qdev.no_user = 1,
.init = i8042_initfn,
};
PCIPCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev, dev);
cpu_unregister_io_memory(d->state.mmio_index);
- vmstate_unregister(&vmstate_pci_pcnet, d);
qemu_del_timer(d->state.poll_timer);
qemu_free_timer(d->state.poll_timer);
qemu_del_vlan_client(&d->state.nic->nc);
s->phys_mem_read = pci_physical_memory_read;
s->phys_mem_write = pci_physical_memory_write;
- vmstate_register(-1, &vmstate_pci_pcnet, d);
-
if (!pci_dev->qdev.hotplugged) {
static int loaded = 0;
if (!loaded) {
.qdev.name = "pcnet",
.qdev.size = sizeof(PCIPCNetState),
.qdev.reset = pci_reset,
+ .qdev.vmsd = &vmstate_pci_pcnet,
.init = pci_pcnet_init,
.exit = pci_pcnet_uninit,
.qdev.props = (Property[]) {
d->dev.config[0x72] = 0x02; /* SMRAM */
- vmstate_register(0, &vmstate_i440fx, d);
return 0;
}
uint8_t *pci_conf;
isa_bus_new(&d->dev.qdev);
- vmstate_register(0, &vmstate_piix3, d);
pci_conf = d->dev.config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
.qdev.name = "i440FX",
.qdev.desc = "Host bridge",
.qdev.size = sizeof(PCII440FXState),
+ .qdev.vmsd = &vmstate_i440fx,
.qdev.no_user = 1,
.init = i440fx_initfn,
.config_write = i440fx_write_config,
.qdev.name = "PIIX3",
.qdev.desc = "ISA bridge",
.qdev.size = sizeof(PIIX3State),
+ .qdev.vmsd = &vmstate_piix3,
.qdev.no_user = 1,
.init = piix3_initfn,
},{
qemu_del_timer(s->timer);
qemu_free_timer(s->timer);
#endif
- vmstate_unregister(&vmstate_rtl8139, s);
qemu_del_vlan_client(&s->nic->nc);
return 0;
}
s->cplus_txbuffer_len = 0;
s->cplus_txbuffer_offset = 0;
- vmstate_register(-1, &vmstate_rtl8139, s);
-
#ifdef RTL8139_ONBOARD_TIMER
s->timer = qemu_new_timer(vm_clock, rtl8139_timer, s);
.qdev.name = "rtl8139",
.qdev.size = sizeof(RTL8139State),
.qdev.reset = rtl8139_reset,
+ .qdev.vmsd = &vmstate_rtl8139,
.init = pci_rtl8139_init,
.exit = pci_rtl8139_uninit,
.qdev.props = (Property[]) {
DMA_register_channel (s->dma, SB_read_DMA, s);
s->can_write = 1;
- vmstate_register (0, &vmstate_sb16, s);
AUD_register_card ("sb16", &s->card);
return 0;
}
.qdev.name = "sb16",
.qdev.desc = "Creative Sound Blaster 16",
.qdev.size = sizeof (SB16State),
+ .qdev.vmsd = &vmstate_sb16,
.init = sb16_initfn,
.qdev.props = (Property[]) {
DEFINE_PROP_HEX32 ("version", SB16State, ver, 0x0405), /* 4.5 */
ssd0303_invalidate_display,
NULL, NULL, s);
qemu_console_resize(s->ds, 96 * MAGNIFY, 16 * MAGNIFY);
- vmstate_register(-1, &vmstate_ssd0303, s);
return 0;
}
static I2CSlaveInfo ssd0303_info = {
.qdev.name = "ssd0303",
.qdev.size = sizeof(ssd0303_state),
+ .qdev.vmsd = &vmstate_ssd0303,
.init = ssd0303_init,
.event = ssd0303_event,
.recv = ssd0303_recv,
tmp105_reset(&s->i2c);
- vmstate_register(-1, &vmstate_tmp105, s);
return 0;
}
static I2CSlaveInfo tmp105_info = {
.qdev.name = "tmp105",
.qdev.size = sizeof(TMP105State),
+ .qdev.vmsd = &vmstate_tmp105,
.init = tmp105_init,
.event = tmp105_event,
.recv = tmp105_rx,
menelaus_reset(&s->i2c);
- vmstate_register(-1, &vmstate_menelaus, s);
return 0;
}
static I2CSlaveInfo twl92230_info = {
.qdev.name ="twl92230",
.qdev.size = sizeof(MenelausState),
+ .qdev.vmsd = &vmstate_menelaus,
.init = twl92230_init,
.event = menelaus_event,
.recv = menelaus_rx,
pci_register_bar(&s->dev, 4, 0x20,
PCI_BASE_ADDRESS_SPACE_IO, uhci_map);
- vmstate_register(0, &vmstate_uhci, s);
return 0;
}
{
.qdev.name = "PIIX3 USB-UHCI",
.qdev.size = sizeof(UHCIState),
+ .qdev.vmsd = &vmstate_uhci,
.init = usb_uhci_piix3_initfn,
},{
.qdev.name = "PIIX4 USB-UHCI",
.qdev.size = sizeof(UHCIState),
+ .qdev.vmsd = &vmstate_uhci,
.init = usb_uhci_piix4_initfn,
},{
/* end of list */
// vga + console init
vga_common_init(s, VGA_RAM_SIZE);
vga_init(s);
- vmstate_register(0, &vmstate_vga_pci, d);
s->ds = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s);
static PCIDeviceInfo vga_info = {
.qdev.name = "VGA",
.qdev.size = sizeof(PCIVGAState),
+ .qdev.vmsd = &vmstate_vga_pci,
.init = pci_vga_initfn,
.config_write = pci_vga_write_config,
.qdev.props = (Property[]) {
vmsvga_init(&s->chip, VGA_RAM_SIZE);
- vmstate_register(0, &vmstate_vmware_vga, s);
return 0;
}
static PCIDeviceInfo vmsvga_info = {
.qdev.name = "QEMUware SVGA",
.qdev.size = sizeof(struct pci_vmsvga_state_s),
+ .qdev.vmsd = &vmstate_vmware_vga,
.init = pci_vmsvga_initfn,
};
pci_register_bar(&d->dev, 0, 0x10,
PCI_BASE_ADDRESS_SPACE_MEMORY, i6300esb_map);
- vmstate_register(-1, &vmstate_i6300esb, d);
-
return 0;
}
static PCIDeviceInfo i6300esb_info = {
.qdev.name = "i6300esb",
.qdev.size = sizeof(I6300State),
+ .qdev.vmsd = &vmstate_i6300esb,
.config_read = i6300esb_config_read,
.config_write = i6300esb_config_write,
.init = i6300esb_init,
IB700State *s = DO_UPCAST(IB700State, dev, dev);
s->timer = qemu_new_timer(vm_clock, ib700_timer_expired, s);
- vmstate_register(-1, &vmstate_ib700, s);
register_ioport_write(0x441, 2, 1, ib700_write_disable_reg, s);
register_ioport_write(0x443, 2, 1, ib700_write_enable_reg, s);
static ISADeviceInfo wdt_ib700_info = {
.qdev.name = "ib700",
.qdev.size = sizeof(IB700State),
+ .qdev.vmsd = &vmstate_ib700,
.init = wdt_ib700_init,
};
AUD_register_card(CODEC, &s->card);
wm8750_reset(&s->i2c);
- vmstate_register(-1, &vmstate_wm8750, s);
return 0;
}
static I2CSlaveInfo wm8750_info = {
.qdev.name = "wm8750",
.qdev.size = sizeof(WM8750State),
+ .qdev.vmsd = &vmstate_wm8750,
.init = wm8750_init,
.event = wm8750_event,
.recv = wm8750_rx,