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arm64: dts: qcom: sm8250: Drop flags for mdss irqs
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 2 Mar 2022 22:54:10 +0000 (01:54 +0300)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 13 Apr 2022 02:34:13 +0000 (21:34 -0500)
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 7c1dffd471b1 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-5-dmitry.baryshkov@linaro.org
arch/arm64/boot/dts/qcom/sm8250.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index af8f226..33ea5ed 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3202,7 +3202,7 @@
                                power-domains = <&rpmhpd SM8250_MMCX>;
 
                                interrupt-parent = <&mdss>;
-                               interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <0>;
 
                                ports {
                                        #address-cells = <1>;
@@ -3254,7 +3254,7 @@
                                reg-names = "dsi_ctrl";
 
                                interrupt-parent = <&mdss>;
-                               interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <4>;
 
                                clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
                                         <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
@@ -3327,7 +3327,7 @@
                                reg-names = "dsi_ctrl";
 
                                interrupt-parent = <&mdss>;
-                               interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <5>;
 
                                clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
                                         <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
Domain: System / Kernel;