Merge tag 'backport/v3.14.24-ltsi-rc1/cpg-to-v3.18-rc1' into backport/v3.14.24-ltsi...

diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
index 8a92b5f..a5f5223 100644 (file)
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
@@ -11,9 +11,12 @@ Required Properties:
 
   - compatible: Must be one of the following
     - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
+    - "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks
     - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
+    - "renesas,r8a7794-mstp-clocks" for R8A7794 (R-Car E2) MSTP gate clocks
+    - "renesas,sh73a0-mstp-clocks" for SH73A0 (SH-MobileAG5) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
   - reg: Base address and length of the I/O mapped registers used by the MSTP
     clocks. The first register is the clock control register and is mandatory.

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d9ddecb..acd5558 100644 (file)
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -741,17 +741,17 @@
                mstp1_clks: mstp1_clks@e6150134 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+                       clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
                                 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
                                 <&zs_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
+                               R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
                                R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
                                R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
                        >;
                        clock-output-names =
-                               "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
+                               "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
                                "vsp1-du0", "vsp1-rt", "vsp1-sy";
                };
                mstp2_clks: mstp2_clks@e6150138 {

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 0d82a4b..ce7b46a 100644 (file)
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -770,16 +770,16 @@
                mstp1_clks: mstp1_clks@e6150134 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+                       clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
                                 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
+                               R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
                                R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
                                R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
                        >;
                        clock-output-names =
-                               "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
+                               "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
                                "vsp1-du0", "vsp1-sy";
                };
                mstp2_clks: mstp2_clks@e6150138 {

diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 9267d29..65f758b 100644 (file)
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -6,7 +6,6 @@
 
 obj-y                          :=
 obj-m                          :=
-obj-n                          := dummy.o
 obj-                           :=
 
 # Objects we always build independent of SoC choice

diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
index e002923..960bf22 100644 (file)
--- a/drivers/clk/shmobile/Makefile
+++ b/drivers/clk/shmobile/Makefile
@@ -4,7 +4,6 @@ obj-$(CONFIG_ARCH_R8A7740)              += clk-r8a7740.o
 obj-$(CONFIG_ARCH_R8A7779)             += clk-r8a7779.o
 obj-$(CONFIG_ARCH_R8A7790)             += clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_R8A7791)             += clk-rcar-gen2.o
+obj-$(CONFIG_ARCH_R8A7794)             += clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_SHMOBILE_MULTI)      += clk-div6.o
 obj-$(CONFIG_ARCH_SHMOBILE_MULTI)      += clk-mstp.o
-# for emply built-in.o
-obj-n  := dummy

diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c
index dff7f79..e996425 100644 (file)
--- a/drivers/clk/shmobile/clk-rcar-gen2.c
+++ b/drivers/clk/shmobile/clk-rcar-gen2.c
@@ -202,6 +202,7 @@ static const struct clk_div_table cpg_sdh_div_table[] = {
 };
 
 static const struct clk_div_table cpg_sd01_div_table[] = {
+       {  4,  8 },
        {  5, 12 }, {  6, 16 }, {  7, 18 }, {  8, 24 },
        { 10, 36 }, { 11, 48 }, { 12, 10 }, {  0,  0 },
 };

diff --git a/drivers/net/wimax/Makefile b/drivers/net/wimax/Makefile
index 992bc02..692184d 100644 (file)
--- a/drivers/net/wimax/Makefile
+++ b/drivers/net/wimax/Makefile
@@ -1,5 +1 @@
-
 obj-$(CONFIG_WIMAX_I2400M)     += i2400m/
-
-# (from Sam Ravnborg) force kbuild to create built-in.o
-obj- := dummy.o

diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index f929a79..8ea7ab0 100644 (file)
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -26,6 +26,7 @@
 #define R8A7790_CLK_MSIOF0             0
 
 /* MSTP1 */
+#define R8A7790_CLK_JPU                6
 #define R8A7790_CLK_TMU1               11
 #define R8A7790_CLK_TMU3               21
 #define R8A7790_CLK_TMU2               22

diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index f0d4d10..58c3f49 100644 (file)
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -25,6 +25,7 @@
 #define R8A7791_CLK_MSIOF0             0
 
 /* MSTP1 */
+#define R8A7791_CLK_JPU                6
 #define R8A7791_CLK_TMU1               11
 #define R8A7791_CLK_TMU3               21
 #define R8A7791_CLK_TMU2               22