sdcard: sm1: add sdcard support. [1/2]
authorQiang Li <qiang.li@amlogic.com>
Tue, 19 Mar 2019 06:44:14 +0000 (14:44 +0800)
committerJianxiong Pan <jianxiong.pan@amlogic.com>
Fri, 29 Mar 2019 12:07:24 +0000 (20:07 +0800)
PD#SWPL-5409

Problem:
sm1 sdcard failed.

Solution:
change sm1 sdcard high speed mode co_phase.

Verify:
SM1_AC200

Change-Id: I295c6fac2594e611bf278f83a97bb503fb8bb13b
Signed-off-by: Qiang Li <qiang.li@amlogic.com>
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
arch/arm/boot/dts/amlogic/mesonsm1.dtsi
arch/arm/boot/dts/amlogic/sm1_pxp.dts
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
arch/arm/boot/dts/amlogic/sm1_s905d3_skt.dts
arch/arm64/boot/dts/amlogic/mesonsm1.dtsi
arch/arm64/boot/dts/amlogic/sm1_pxp.dts
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
arch/arm64/boot/dts/amlogic/sm1_s905d3_skt.dts
drivers/amlogic/mmc/aml_sd_emmc.c
include/linux/amlogic/sd.h

index 3c038c6..47d9a30 100644 (file)
 
        sd_emmc_c: emmc@ffe07000 {
                status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
+               compatible = "amlogic, meson-mmc-sm1";
                reg = <0xffe07000 0x800>;
                interrupts = <0 191 1>;
                pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
                };
        };
 
-       sd_emmc_b1:sd1@ffe05000 {
+       sd_emmc_b:sd@ffe05000 {
                status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
+               compatible = "amlogic, meson-mmc-sm1";
                reg = <0xffe05000 0x800>;
                interrupts = <0 190 1>;
 
                };
        };
 
-       sd_emmc_b2:sd2@ffe05000 {
-               status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
-               reg = <0xffe05000 0x800>;
-               interrupts = <0 190 4>;
-
-               pinctrl-names = "sd_all_pins",
-                       "sd_clk_cmd_pins",
-                       "sd_1bit_pins",
-                       "sd_clk_cmd_uart_pins",
-                       "sd_1bit_uart_pins",
-                       "sd_to_ao_uart_pins",
-                       "ao_to_sd_uart_pins",
-                       "sd_to_ao_jtag_pins",
-                       "ao_to_sd_jtag_pins",
-                       "sdio_noclr_all_pins",
-                       "sdio_noclr_clk_cmd_pins",
-                       "sdio_all_pins",
-                       "sdio_clk_cmd_pins";
-               pinctrl-0 = <&sdio_x_clr_pins &sd_all_pins>;
-               pinctrl-1 = <&sdio_x_clr_pins &sd_clk_cmd_pins>;
-               pinctrl-2 = <&sdio_x_clr_pins &sd_1bit_pins>;
-               pinctrl-3 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
-                       &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
-               pinctrl-4 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
-                       &sd_1bit_pins &ao_to_sd_uart_pins>;
-               pinctrl-5 = <&sdio_x_clr_pins
-                       &sd_all_pins &sd_to_ao_uart_pins>;
-               pinctrl-6 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
-                       &sd_clr_noall_pins &ao_to_sd_uart_pins>;
-               pinctrl-7 = <&sdio_x_en_pins
-                       &sd_clr_all_pins &sd_to_ao_uart_pins>;
-               pinctrl-8 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
-                       &sd_clr_noall_pins &ao_to_sd_uart_pins>;
-               pinctrl-9 = <&sd_clr_noall_pins
-                       &sdio_x_en_pins &sdio_x_all_pins>;
-               pinctrl-10 = <&sd_clr_noall_pins
-                       &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
-               pinctrl-11 = <&sd_clr_all_pins
-                        &sdio_x_en_pins &sdio_x_all_pins>;
-               pinctrl-12 = <&sd_clr_all_pins
-                        &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
-
-               clocks = <&clkc CLKID_SD_EMMC_B>,
-                       <&clkc CLKID_SD_EMMC_B_P0_COMP>,
-                       <&clkc CLKID_FCLK_DIV2>,
-                       <&clkc CLKID_FCLK_DIV5>,
-                       <&xtal>;
-               clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
-               bus-width = <4>;
-               cap-sd-highspeed;
-               cap-mmc-highspeed;
-               max-frequency = <100000000>;
-               disable-wp;
-               sd {
-                       pinname = "sd";
-                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
-                       max_req_size = <0x20000>; /**128KB*/
-                       gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
-                       jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
-                       gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
-                       card_type = <5>;
-                       /* 3:sdio device(ie:sdio-wifi),
-                        * 5:NON sdio device(means sd/mmc card)
-                        */
-               };
-
-               sdio {
-                       pinname = "sdio";
-                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
-                       max_req_size = <0x20000>; /**128KB*/
-                       card_type = <3>;
-                       /* 3:sdio device(ie:sdio-wifi),
-                        * 5:NON sdio device(means sd/mmc card)
-                        */
-               };
-       };
 
        sd_emmc_a:sdio@ffe03000 {
                status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
+               compatible = "amlogic, meson-mmc-sm1";
                reg = <0xffe03000 0x800>;
                interrupts = <0 189 4>;
 
                sdio {
                        pinname = "sdio";
                        ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
-                       /* max_req_size = <0x20000>; */ /**128KB*/
-                       max_req_size = <0x400>;
+                       max_req_size = <0x20000>; /**128KB*/
                        card_type = <3>;
                        /* 3:sdio device(ie:sdio-wifi),
                         * 4:SD combo (IO+mem) card
                         */
-                       dmode = "pio";
                };
        };
 
index 78cdd87..3aeb950 100644 (file)
         */
        tv_bit_mode = <1>;
 };
-&sd_emmc_b1 {
+&sd_emmc_b {
        status = "okay";
        sd {
                caps = "MMC_CAP_4_BIT_DATA",
                         "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED",
-                        "MMC_CAP_NONREMOVABLE",
-                        "MMC_CAP_UHS_SDR12",
-                        "MMC_CAP_UHS_SDR25",
-                        "MMC_CAP_UHS_SDR50",
-                        "MMC_PM_KEEP_POWER",
-                        "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+                        "MMC_CAP_SD_HIGHSPEED";
                f_min = <400000>;
                f_max = <200000000>;
        };
index 57f6e99..df9ef4c 100644 (file)
        };
 };
 
-&sd_emmc_b1 {
-       status = "disabled";
+&sd_emmc_b {
+       status = "okay";
        sd {
                caps = "MMC_CAP_4_BIT_DATA",
                         "MMC_CAP_MMC_HIGHSPEED",
        };
 };
 
-&sd_emmc_b2 {
-       status = "disabled";
-       sd {
-               caps = "MMC_CAP_4_BIT_DATA",
-                        "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED";
-
-               f_min = <400000>;
-               f_max = <50000000>;
-       };
-
-       sdio {
-               caps = "MMC_CAP_4_BIT_DATA",
-                        "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED",
-                        "MMC_CAP_NONREMOVABLE",
-                        "MMC_CAP_UHS_SDR12",
-                        "MMC_CAP_UHS_SDR25",
-                        "MMC_CAP_UHS_SDR50",
-                        "MMC_CAP_UHS_SDR104",
-                        "MMC_PM_KEEP_POWER",
-                        "MMC_CAP_SDIO_IRQ";
-
-               f_min = <400000>;
-               f_max = <200000000>;
-       };
-};
 
 &sd_emmc_a {
        status = "disabled";
index 8ea7ee2..5d2a770 100644 (file)
        };
 };
 
-&sd_emmc_b1 {
-       status = "disabled";
+&sd_emmc_b {
+       status = "okay";
        sd {
                caps = "MMC_CAP_4_BIT_DATA",
                         "MMC_CAP_MMC_HIGHSPEED",
index 7300639..d28afd4 100644 (file)
 
        sd_emmc_c: emmc@ffe07000 {
                status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
+               compatible = "amlogic, meson-mmc-sm1";
                reg = <0x0 0xffe07000 0x0 0x800>;
                interrupts = <0 191 1>;
                pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
                };
        };
 
-       sd_emmc_b1:sd1@ffe05000 {
+       sd_emmc_b:sd@ffe05000 {
                status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
+               compatible = "amlogic, meson-mmc-sm1";
                reg = <0x0 0xffe05000 0x0 0x800>;
                interrupts = <0 190 1>;
 
                };
        };
 
-       sd_emmc_b2:sd2@ffe05000 {
-               status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
-               reg = <0x0 0xffe05000 0x0 0x800>;
-               interrupts = <0 190 4>;
-
-               pinctrl-names = "sd_all_pins",
-                       "sd_clk_cmd_pins",
-                       "sd_1bit_pins",
-                       "sd_clk_cmd_uart_pins",
-                       "sd_1bit_uart_pins",
-                       "sd_to_ao_uart_pins",
-                       "ao_to_sd_uart_pins",
-                       "sd_to_ao_jtag_pins",
-                       "ao_to_sd_jtag_pins",
-                       "sdio_noclr_all_pins",
-                       "sdio_noclr_clk_cmd_pins",
-                       "sdio_all_pins",
-                       "sdio_clk_cmd_pins";
-               pinctrl-0 = <&sdio_x_clr_pins &sd_all_pins>;
-               pinctrl-1 = <&sdio_x_clr_pins &sd_clk_cmd_pins>;
-               pinctrl-2 = <&sdio_x_clr_pins &sd_1bit_pins>;
-               pinctrl-3 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
-                       &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
-               pinctrl-4 = <&sdio_x_clr_pins &sd_to_ao_uart_clr_pins
-                       &sd_1bit_pins &ao_to_sd_uart_pins>;
-               pinctrl-5 = <&sdio_x_clr_pins
-                       &sd_all_pins &sd_to_ao_uart_pins>;
-               pinctrl-6 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
-                       &sd_clr_noall_pins &ao_to_sd_uart_pins>;
-               pinctrl-7 = <&sdio_x_en_pins
-                       &sd_clr_all_pins &sd_to_ao_uart_pins>;
-               pinctrl-8 = <&sdio_x_en_pins &sd_to_ao_uart_clr_pins
-                       &sd_clr_noall_pins &ao_to_sd_uart_pins>;
-               pinctrl-9 = <&sd_clr_noall_pins
-                       &sdio_x_en_pins &sdio_x_all_pins>;
-               pinctrl-10 = <&sd_clr_noall_pins
-                       &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
-               pinctrl-11 = <&sd_clr_all_pins
-                        &sdio_x_en_pins &sdio_x_all_pins>;
-               pinctrl-12 = <&sd_clr_all_pins
-                        &sdio_x_en_pins &sdio_x_clk_cmd_pins>;
-
-               clocks = <&clkc CLKID_SD_EMMC_B>,
-                       <&clkc CLKID_SD_EMMC_B_P0_COMP>,
-                       <&clkc CLKID_FCLK_DIV2>,
-                       <&clkc CLKID_FCLK_DIV5>,
-                       <&xtal>;
-               clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
-               bus-width = <4>;
-               cap-sd-highspeed;
-               cap-mmc-highspeed;
-               max-frequency = <100000000>;
-               disable-wp;
-               sd {
-                       pinname = "sd";
-                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
-                       max_req_size = <0x20000>; /**128KB*/
-                       gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
-                       jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
-                       gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
-                       card_type = <5>;
-                       /* 3:sdio device(ie:sdio-wifi),
-                        * 5:NON sdio device(means sd/mmc card)
-                        */
-               };
-
-               sdio {
-                       pinname = "sdio";
-                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
-                       max_req_size = <0x20000>; /**128KB*/
-                       card_type = <3>;
-                       /* 3:sdio device(ie:sdio-wifi),
-                        * 5:NON sdio device(means sd/mmc card)
-                        */
-               };
-       };
 
        sd_emmc_a:sdio@ffe03000 {
                status = "disabled";
-               compatible = "amlogic, meson-mmc-g12a";
+               compatible = "amlogic, meson-mmc-sm1";
                reg = <0x0 0xffe03000 0x0 0x800>;
                interrupts = <0 189 4>;
 
                sdio {
                        pinname = "sdio";
                        ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
-                       /* max_req_size = <0x20000>; */ /**128KB*/
-                       max_req_size = <0x400>;
+                       max_req_size = <0x20000>; /**128KB*/
                        card_type = <3>;
                        /* 3:sdio device(ie:sdio-wifi),
                         * 4:SD combo (IO+mem) card
                         */
-                       dmode = "pio";
                };
        };
 
index 493771e..ab80a59 100644 (file)
         */
        tv_bit_mode = <1>;
 };
-&sd_emmc_b1 {
+
+&sd_emmc_b {
        status = "okay";
        sd {
                caps = "MMC_CAP_4_BIT_DATA",
                         "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED",
-                        "MMC_CAP_NONREMOVABLE",
-                        "MMC_CAP_UHS_SDR12",
-                        "MMC_CAP_UHS_SDR25",
-                        "MMC_CAP_UHS_SDR50",
-                        "MMC_PM_KEEP_POWER",
-                        "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+                        "MMC_CAP_SD_HIGHSPEED";
                f_min = <400000>;
-               f_max = <200000000>;
+               f_max = <50000000>;
        };
 };
 
-
 &defendkey {
        status = "okay";
 };
index 20d086b..0a767fe 100644 (file)
                         "MMC_CAP_HW_RESET",
                         "MMC_CAP_ERASE",
                         "MMC_CAP_CMD23";
-               caps2 = "MMC_CAP2_HS200";
+               /*caps2 = "MMC_CAP2_HS200";*/
                /* "MMC_CAP2_HS400";*/
                f_min = <400000>;
-               f_max = <200000000>;
-       };
-};
-
-&sd_emmc_b1 {
-       status = "disabled";
-       sd {
-               caps = "MMC_CAP_4_BIT_DATA",
-                        "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED";
-               f_min = <400000>;
                f_max = <50000000>;
        };
 };
 
-&sd_emmc_b2 {
-       status = "disabled";
+&sd_emmc_b {
+       status = "okay";
        sd {
                caps = "MMC_CAP_4_BIT_DATA",
                         "MMC_CAP_MMC_HIGHSPEED",
                         "MMC_CAP_SD_HIGHSPEED";
-
                f_min = <400000>;
                f_max = <50000000>;
        };
-
-       sdio {
-               caps = "MMC_CAP_4_BIT_DATA",
-                        "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED",
-                        "MMC_CAP_NONREMOVABLE",
-                        "MMC_CAP_UHS_SDR12",
-                        "MMC_CAP_UHS_SDR25",
-                        "MMC_CAP_UHS_SDR50",
-                        "MMC_CAP_UHS_SDR104",
-                        "MMC_PM_KEEP_POWER",
-                        "MMC_CAP_SDIO_IRQ";
-
-               f_min = <400000>;
-               f_max = <200000000>;
-       };
 };
 
+
 &sd_emmc_a {
        status = "disabled";
        sdio {
index 391e792..2eae013 100644 (file)
                         "MMC_CAP_HW_RESET",
                         "MMC_CAP_ERASE",
                         "MMC_CAP_CMD23";
-               caps2 = "MMC_CAP2_HS200";
+               /*caps2 = "MMC_CAP2_HS200";*/
                /* "MMC_CAP2_HS400";*/
                f_min = <400000>;
-               f_max = <200000000>;
-       };
-};
-
-&sd_emmc_b1 {
-       status = "disabled";
-       sd {
-               caps = "MMC_CAP_4_BIT_DATA",
-                        "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED";
-               f_min = <400000>;
                f_max = <50000000>;
        };
 };
 
-&sd_emmc_b2 {
-       status = "disabled";
+&sd_emmc_b {
+       status = "okay";
        sd {
                caps = "MMC_CAP_4_BIT_DATA",
                         "MMC_CAP_MMC_HIGHSPEED",
                         "MMC_CAP_SD_HIGHSPEED";
-
                f_min = <400000>;
                f_max = <50000000>;
        };
-
-       sdio {
-               caps = "MMC_CAP_4_BIT_DATA",
-                        "MMC_CAP_MMC_HIGHSPEED",
-                        "MMC_CAP_SD_HIGHSPEED",
-                        "MMC_CAP_NONREMOVABLE",
-                        "MMC_CAP_UHS_SDR12",
-                        "MMC_CAP_UHS_SDR25",
-                        "MMC_CAP_UHS_SDR50",
-                        "MMC_CAP_UHS_SDR104",
-                        "MMC_PM_KEEP_POWER",
-                        "MMC_CAP_SDIO_IRQ";
-
-               f_min = <400000>;
-               f_max = <200000000>;
-       };
 };
 
+
 &sd_emmc_a {
        status = "disabled";
        sdio {
index 19f17d5..a945f8b 100644 (file)
@@ -3623,6 +3623,31 @@ static struct meson_mmc_data mmc_data_tl1 = {
        .sdmmc.sdr104.core_phase = 2,
 };
 
+static struct meson_mmc_data mmc_data_sm1 = {
+       .chip_type = MMC_CHIP_SM1,
+       .port_a_base = 0xffe03000,
+       .port_b_base = 0xffe05000,
+       .port_c_base = 0xffe07000,
+       .pinmux_base = 0xff634400,
+       .clksrc_base = 0xff63c000,
+       .ds_pin_poll = 0x3a,
+       .ds_pin_poll_en = 0x48,
+       .ds_pin_poll_bit = 13,
+       .sdmmc.init.core_phase = 3,
+       .sdmmc.init.tx_phase = 0,
+       .sdmmc.init.rx_phase = 0,
+       .sdmmc.calc.core_phase = 0,
+       .sdmmc.calc.tx_phase = 2,
+       .sdmmc.hs.core_phase = 3,
+       .sdmmc.ddr.core_phase = 2,
+       .sdmmc.ddr.tx_phase = 0,
+       .sdmmc.hs2.core_phase = 3,
+       .sdmmc.hs2.tx_phase = 0,
+       .sdmmc.hs4.tx_delay = 0,
+       .sdmmc.sd_hs.core_phase = 3,
+       .sdmmc.sdr104.core_phase = 2,
+       .sdmmc.sdr104.tx_phase = 0,
+};
 static const struct of_device_id meson_mmc_of_match[] = {
        {
                .compatible = "amlogic, meson-mmc-gxbb",
@@ -3676,6 +3701,10 @@ static const struct of_device_id meson_mmc_of_match[] = {
                .compatible = "amlogic, meson-mmc-g12b-a",
                .data = &mmc_data_g12b_a,
        },
+       {
+               .compatible = "amlogic, meson-mmc-sm1",
+               .data = &mmc_data_sm1,
+       },
 
        {}
 };
index 045f770..8182df3 100644 (file)
@@ -192,6 +192,7 @@ enum mmc_chip_e {
        MMC_CHIP_GXLX2 = 0x2a,
        MMC_CHIP_TL1 = 0X2b,
        MMC_CHIP_G12B = 0x29b,
+       MMC_CHIP_SM1 = 0X2C,
 };
 
 struct mmc_phase {