iommu/amd: Tidy up DMA ops init

Now that DMA ops are part of the core API via iommu-dma, fold the
vestigial remains of the IOMMU_DMA_OPS init state into the IOMMU API
phase, and clean up a few other leftovers. This should also close the
race window wherein bus_set_iommu() effectively makes the DMA ops state
visible before its nominal initialisation - it seems this was previously
fairly benign, but since commit a250c23f15c2 ("iommu: remove
DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE") it can now lead to the strict flush
queue policy inadvertently being picked for default domains allocated
during that window, with a corresponding unexpected perfomance impact.

Reported-by: Jussi Maki <joamaki@gmail.com>
Tested-by: Jussi Maki <joamaki@gmail.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Fixes: a250c23f15c2 ("iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE")
Link: https://lore.kernel.org/r/665db61e23ff8d54ac5eb391bef520b3a803fcb9.1622727974.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>

diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 55dd38d..416815a 100644 (file)
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -11,8 +11,6 @@
 
 #include "amd_iommu_types.h"
 
-extern int amd_iommu_init_dma_ops(void);
-extern int amd_iommu_init_passthrough(void);
 extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
 extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
 extern void amd_iommu_apply_erratum_63(u16 devid);

diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index d006724..a418bf5 100644 (file)
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -231,7 +231,6 @@ enum iommu_init_state {
        IOMMU_ENABLED,
        IOMMU_PCI_INIT,
        IOMMU_INTERRUPTS_EN,
-       IOMMU_DMA_OPS,
        IOMMU_INITIALIZED,
        IOMMU_NOT_FOUND,
        IOMMU_INIT_ERROR,
@@ -2895,10 +2894,6 @@ static int __init state_next(void)
                init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN;
                break;
        case IOMMU_INTERRUPTS_EN:
-               ret = amd_iommu_init_dma_ops();
-               init_state = ret ? IOMMU_INIT_ERROR : IOMMU_DMA_OPS;
-               break;
-       case IOMMU_DMA_OPS:
                init_state = IOMMU_INITIALIZED;
                break;
        case IOMMU_INITIALIZED:

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 3ac42bb..c46dde8 100644 (file)
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -30,7 +30,6 @@
 #include <linux/msi.h>
 #include <linux/irqdomain.h>
 #include <linux/percpu.h>
-#include <linux/iova.h>
 #include <linux/io-pgtable.h>
 #include <asm/irq_remapping.h>
 #include <asm/io_apic.h>
@@ -1773,13 +1772,22 @@ void amd_iommu_domain_update(struct protection_domain *domain)
        amd_iommu_domain_flush_complete(domain);
 }
 
+static void __init amd_iommu_init_dma_ops(void)
+{
+       swiotlb = (iommu_default_passthrough() || sme_me_mask) ? 1 : 0;
+
+       if (amd_iommu_unmap_flush)
+               pr_info("IO/TLB flush on unmap enabled\n");
+       else
+               pr_info("Lazy IO/TLB flushing enabled\n");
+       iommu_set_dma_strict(amd_iommu_unmap_flush);
+}
+
 int __init amd_iommu_init_api(void)
 {
-       int ret, err = 0;
+       int err = 0;
 
-       ret = iova_cache_get();
-       if (ret)
-               return ret;
+       amd_iommu_init_dma_ops();
 
        err = bus_set_iommu(&pci_bus_type, &amd_iommu_ops);
        if (err)
@@ -1796,19 +1804,6 @@ int __init amd_iommu_init_api(void)
        return 0;
 }
 
-int __init amd_iommu_init_dma_ops(void)
-{
-       swiotlb        = (iommu_default_passthrough() || sme_me_mask) ? 1 : 0;
-
-       if (amd_iommu_unmap_flush)
-               pr_info("IO/TLB flush on unmap enabled\n");
-       else
-               pr_info("Lazy IO/TLB flushing enabled\n");
-       iommu_set_dma_strict(amd_iommu_unmap_flush);
-       return 0;
-
-}
-
 /*****************************************************************************
  *
  * The following functions belong to the exported interface of AMD IOMMU