[PATCH 3/4] Add support for rtx costing of CCMP on AArch64
authorjiwang <jiwang@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 19 Jan 2016 14:10:49 +0000 (14:10 +0000)
committerjiwang <jiwang@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 19 Jan 2016 14:10:49 +0000 (14:10 +0000)
    2015-01-19  Wilco Dijkstra  <wdijkstr@arm.com>

    gcc/
        * /config/aarch64/aarch64.c (aarch64_if_then_else_costs):
        Add support for CCMP costing.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232564 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/aarch64/aarch64.c

index 319bb92..a9cc4e4 100644 (file)
@@ -1,5 +1,10 @@
 2016-01-19  Wilco Dijkstra  <wdijkstr@arm.com>
 
+       * /config/aarch64/aarch64.c (aarch64_if_then_else_costs):
+       Add support for CCMP costing.
+
+2015-01-19  Wilco Dijkstra  <wdijkstr@arm.com>
+
        * ccmp.c (ccmp_candidate_p): Remove integer-only restriction.
        * config/aarch64/aarch64.md (fccmp<mode>): New pattern.
        (fccmpe<mode>): Likewise.
index 9e9b424..03bc1b9 100644 (file)
@@ -6004,6 +6004,26 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2, int *cost, bool speed)
     }
   else if (GET_MODE_CLASS (GET_MODE (inner)) == MODE_CC)
     {
+      /* CCMP.  */
+      if ((GET_CODE (op1) == COMPARE) && CONST_INT_P (op2))
+       {
+         /* Increase cost of CCMP reg, 0, imm, CC to prefer CMP reg, 0.  */
+         if (XEXP (op1, 1) == const0_rtx)
+           *cost += 1;
+         if (speed)
+           {
+             machine_mode mode = GET_MODE (XEXP (op1, 0));
+             const struct cpu_cost_table *extra_cost
+               = aarch64_tune_params.insn_extra_cost;
+
+             if (GET_MODE_CLASS (mode) == MODE_INT)
+               *cost += extra_cost->alu.arith;
+             else
+               *cost += extra_cost->fp[mode == DFmode].compare;
+           }
+         return true;
+       }
+
       /* It's a conditional operation based on the status flags,
         so it must be some flavor of CSEL.  */