nv50/ir/opt: check BB equality before instruction ordering in CSE

diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
index 35ddca3..259bb56 100644 (file)
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
@@ -2096,7 +2096,7 @@ LocalCSE::visit(BasicBlock *bb)
             for (Value::UseIterator it = src->uses.begin();
                  it != src->uses.end(); ++it) {
                Instruction *ik = (*it)->getInsn();
-               if (ik && ik->serial < ir->serial && ik->bb == ir->bb)
+               if (ik && ik->bb == ir->bb && ik->serial < ir->serial)
                   if (tryReplace(&ir, ik))
                      break;
             }