u32 padctrl1;
};
+#define CHV_INVALID_HWIRQ ((unsigned int)INVALID_HWIRQ)
+
/**
* struct intel_community_context - community context for Cherryview
* @intr_lines: Mapping between 16 HW interrupt wires and GPIO offset (in GPIO number space)
/* Reset the interrupt mapping */
for (i = 0; i < ARRAY_SIZE(cctx->intr_lines); i++) {
if (cctx->intr_lines[i] == offset) {
- cctx->intr_lines[i] = 0;
+ cctx->intr_lines[i] = CHV_INVALID_HWIRQ;
break;
}
}
else
handler = handle_edge_irq;
- if (!cctx->intr_lines[intsel]) {
+ if (cctx->intr_lines[intsel] == CHV_INVALID_HWIRQ) {
irq_set_handler_locked(d, handler);
cctx->intr_lines[intsel] = pin;
}
unsigned int offset;
offset = cctx->intr_lines[intr_line];
+ if (offset == CHV_INVALID_HWIRQ) {
+ dev_err(pctrl->dev, "interrupt on unused interrupt line %u\n",
+ intr_line);
+ continue;
+ }
+
generic_handle_domain_irq(gc->irq.domain, offset);
}
static int chv_pinctrl_probe(struct platform_device *pdev)
{
const struct intel_pinctrl_soc_data *soc_data;
+ struct intel_community_context *cctx;
struct intel_community *community;
struct device *dev = &pdev->dev;
struct acpi_device *adev = ACPI_COMPANION(dev);
struct intel_pinctrl *pctrl;
acpi_status status;
+ unsigned int i;
int ret, irq;
soc_data = intel_pinctrl_get_soc_data(pdev);
if (!pctrl->context.communities)
return -ENOMEM;
+ cctx = &pctrl->context.communities[0];
+ for (i = 0; i < ARRAY_SIZE(cctx->intr_lines); i++)
+ cctx->intr_lines[i] = CHV_INVALID_HWIRQ;
+
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;