<< getNVPTXRegClassStr(RC) << mapped_vr << "_1"
<< "}";
else
- assert(0 && "Unsupported vector size");
+ llvm_unreachable("Unsupported vector size");
}
void
O << "_" << vecelem[Imm%2];
}
else
- assert(0 && "Unknown Modifier on immediate operand");
+ llvm_unreachable("Unknown Modifier on immediate operand");
}
void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
if (strcmp(Modifier, "vecfull") == 0)
emitVirtualRegister(MO.getReg(), true, O);
else
- assert(0 &&
+ llvm_unreachable(
"Don't know how to handle the modifier on virtual register.");
}
}
else if (strstr(Modifier, "vec") == Modifier)
printVecModifiedImmediate(MO, Modifier, O);
else
- assert(0 && "Don't know how to handle modifier on immediate operand");
+ llvm_unreachable("Don't know how to handle modifier on immediate operand");
return;
case MachineOperand::MO_FPImmediate:
return;
default:
- assert(0 && " Operand type not supported.");
+ llvm_unreachable("Operand type not supported.");
}
}
O << "shared" ;
break;
default:
- assert(0 && "unexpected address space");
+ llvm_unreachable("unexpected address space");
}
}
ptr = (unsigned char*)&int32;
aggBuffer->addBytes(ptr, 4, Bytes);
break;
- }
- else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
+ } else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
if (ConstantInt *constInt =
dyn_cast<ConstantInt>(ConstantFoldConstantExpression(
Cexpr, TD))) {
break;
}
}
- assert(0 && "unsupported integer const type");
+ llvm_unreachable("unsupported integer const type");
} else if (ETy == Type::getInt64Ty(CPV->getContext()) ) {
if (ConstantInt *constInt = dyn_cast<ConstantInt>(CPV)) {
long long int64 =(long long)(constInt->getZExtValue());
ptr = (unsigned char*)&int64;
aggBuffer->addBytes(ptr, 8, Bytes);
break;
- }
- else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
+ } else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
if (ConstantInt *constInt = dyn_cast<ConstantInt>(
ConstantFoldConstantExpression(Cexpr, TD))) {
long long int64 =(long long)(constInt->getZExtValue());
}
}
llvm_unreachable("unsupported integer const type");
- }
- else
+ } else
llvm_unreachable("unsupported integer const type");
break;
}
}
return;
}
- assert(0 && "unsupported constant type in printAggregateConstant()");
+ llvm_unreachable("unsupported constant type in printAggregateConstant()");
}
// buildTypeNameMap - Run through symbol table looking for type names.
return getNVPTXRegClassName(&NVPTX::Int32RegsRegClass);
if (RC->getID() == NVPTX::V4I8RegsRegClassID)
return getNVPTXRegClassName(&NVPTX::Int8RegsRegClass);
- assert(0 && "Not a vector register class");
- return "Unsupported";
+ llvm_unreachable("Not a vector register class");
}
const TargetRegisterClass *getNVPTXElemClass(TargetRegisterClass const *RC) {
return (&NVPTX::Int32RegsRegClass);
if (RC->getID() == NVPTX::V4I8RegsRegClassID)
return (&NVPTX::Int8RegsRegClass);
- assert(0 && "Not a vector register class");
- return 0;
+ llvm_unreachable("Not a vector register class");
}
int getNVPTXVectorSize(TargetRegisterClass const *RC) {
return 4;
if (RC->getID() == NVPTX::V4I8RegsRegClassID)
return 4;
- assert(0 && "Not a vector register class");
- return -1;
+ llvm_unreachable("Not a vector register class");
}
}