rtl8xxxu: Use descriptive bits for setting RX paths for 1T2R parts
authorJes Sorensen <Jes.Sorensen@redhat.com>
Thu, 14 Apr 2016 18:58:56 +0000 (14:58 -0400)
committerKalle Valo <kvalo@codeaurora.org>
Fri, 15 Apr 2016 18:36:37 +0000 (21:36 +0300)
This reduce the use of magic values a little.

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h

index d0330a8..3c45ad0 100644 (file)
@@ -3814,8 +3814,10 @@ static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv)
                rtl8xxxu_write32(priv, REG_FPGA1_TX_INFO, val32);
 
                val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
+               val32 &= ~CCK0_AFE_RX_MASK;
                val32 &= 0x00ffffff;
-               val32 |= 0x45000000;
+               val32 |= 0x40000000;
+               val32 |= CCK0_AFE_RX_ANT_B;
                rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);
 
                val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);
index a2cff22..e7709a5 100644 (file)
 #define  CCK0_SIDEBAND                 BIT(4)
 
 #define REG_CCK0_AFE_SETTING           0x0a04
+#define  CCK0_AFE_RX_MASK              0x0f000000
+#define  CCK0_AFE_RX_ANT_AB            BIT(24)
+#define  CCK0_AFE_RX_ANT_A             0
+#define  CCK0_AFE_RX_ANT_B             (BIT(24) | BIT(26))
 
 #define REG_CONFIG_ANT_A               0x0b68
 #define REG_CONFIG_ANT_B               0x0b6c