drm/amdgpu/si: fix ASIC tests

[ Upstream commit 77efe48a729588527afb4d5811b9e0acb29f5e51 ]

Comparing adev->family with CHIP constants is not correct.
adev->family can only be compared with AMDGPU_FAMILY constants and
adev->asic_type is the struct member to compare with CHIP constants.
They are separate identification spaces.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10")
Cc: Ken Wang <Qingqing.Wang@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 327bdf1..b0beb5e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1606,7 +1606,7 @@ static void si_program_aspm(struct amdgpu_device *adev)
                        if (orig != data)
                                si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_1, data);
 
-                       if ((adev->family != CHIP_OLAND) && (adev->family != CHIP_HAINAN)) {
+                       if ((adev->asic_type != CHIP_OLAND) && (adev->asic_type != CHIP_HAINAN)) {
                                orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0);
                                data &= ~PLL_RAMP_UP_TIME_0_MASK;
                                if (orig != data)
@@ -1655,14 +1655,14 @@ static void si_program_aspm(struct amdgpu_device *adev)
 
                        orig = data = si_pif_phy0_rreg(adev,PB0_PIF_CNTL);
                        data &= ~LS2_EXIT_TIME_MASK;
-                       if ((adev->family == CHIP_OLAND) || (adev->family == CHIP_HAINAN))
+                       if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN))
                                data |= LS2_EXIT_TIME(5);
                        if (orig != data)
                                si_pif_phy0_wreg(adev,PB0_PIF_CNTL, data);
 
                        orig = data = si_pif_phy1_rreg(adev,PB1_PIF_CNTL);
                        data &= ~LS2_EXIT_TIME_MASK;
-                       if ((adev->family == CHIP_OLAND) || (adev->family == CHIP_HAINAN))
+                       if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN))
                                data |= LS2_EXIT_TIME(5);
                        if (orig != data)
                                si_pif_phy1_wreg(adev,PB1_PIF_CNTL, data);