osd: tl1: add osd support for tl1 [1/1]

PD#172587

Problem:
Bringup osd for TL1.

Solution:
Add osd support for TL1.
Add ge2d device tree node for TL1.

Verify:
Verified on PXP/PTM.

Change-Id: I3d20934f015108f545c3c72b979d1bd8187b282e
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>

diff --git a/arch/arm/boot/dts/amlogic/mesontl1.dtsi b/arch/arm/boot/dts/amlogic/mesontl1.dtsi
index 8d24491..c2ae643 100644 (file)
--- a/arch/arm/boot/dts/amlogic/mesontl1.dtsi
+++ b/arch/arm/boot/dts/amlogic/mesontl1.dtsi
@@ -549,6 +549,12 @@
                                pinctrl-0=<&i2c_ao_slave_pins>;
                        };
                };/* end of aobus */
+
+               ion_dev {
+                       compatible = "amlogic, ion_dev";
+                       status = "okay";
+                       memory-region = <&ion_cma_reserved>;
+               };/* end of ion_dev*/
        }; /* end of soc*/
 
        custom_maps: custom_maps {
@@ -925,6 +931,38 @@
                interrupts = <0 89 1>;
                interrupt-names = "rdma";
        };
+
+       meson_fb: fb {
+               compatible = "amlogic, meson-tl1";
+               memory-region = <&logo_reserved>;
+               status = "disabled";
+               interrupts = <0 3 1
+                       0 56 1
+                       0 89 1>;
+               interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
+               /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+               display_mode_default = "1080p60hz";
+               scale_mode = <1>;
+               /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+               display_size_default = <1920 1080 1920 2160 32>;
+               /*1920*1080*4*3 = 0x17BB000*/
+               clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+               clock-names = "vpu_clkc";
+       };
+
+       ge2d {
+               compatible = "amlogic, ge2d-g12a";
+               status = "okay";
+               interrupts = <0 146 1>;
+               interrupt-names = "ge2d";
+               clocks = <&clkc CLKID_VAPB_MUX>,
+                       <&clkc CLKID_G2D>,
+                       <&clkc CLKID_GE2D_GATE>;
+               clock-names = "clk_vapb_0",
+                       "clk_ge2d",
+                       "clk_ge2d_gate";
+               reg = <0xff940000 0x10000>;
+       };
 }; /* end of / */
 
 &pinctrl_aobus {

diff --git a/arch/arm/boot/dts/amlogic/tl1_pxp.dts b/arch/arm/boot/dts/amlogic/tl1_pxp.dts
index 386ded7..d95d93d 100644 (file)
--- a/arch/arm/boot/dts/amlogic/tl1_pxp.dts
+++ b/arch/arm/boot/dts/amlogic/tl1_pxp.dts
@@ -67,6 +67,23 @@
                        alignment = <0x100000>;
                        //no-map;
                };
+
+               logo_reserved:linux,meson-fb {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x800000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x7f800000 0x800000>;
+               };
+
+               ion_cma_reserved:linux,ion-dev {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x8000000>;
+                       alignment = <0x400000>;
+               };
+
+
        };
 
        codec_mm {
@@ -80,7 +97,8 @@
                status = "okay";
                fr_auto_policy = <0>;
        };
-};
+}; /* end of / */
+
 &sd_emmc_b {
        status = "okay";
        sd {
@@ -91,14 +109,14 @@
                f_min = <400000>;
                f_max = <200000000>;
        };
-}; /* end of / */
+};
 
 &spifc {
        status = "disabled";
        spi-nor@0 {
                cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
-               };
        };
+};
 
 &slc_nand {
        status = "disabled";
@@ -173,3 +191,12 @@
        pinctrl-0 = <&spicc0_pins_h>;
        cs-gpios = <&gpio GPIOH_20 0>;
 };
+
+&meson_fb {
+       status = "okay";
+       display_size_default = <1920 1080 1920 2160 32>;
+       mem_size = <0x00800000 0x1980000 0x100000 0x800000>;
+       logo_addr = "0x7f800000";
+       mem_alloc = <1>;
+       pxp_mode = <1>; /** 0:normal mode 1:pxp mode */
+};

diff --git a/drivers/amlogic/media/osd/osd.h b/drivers/amlogic/media/osd/osd.h
index 57004bf..0375b5c 100644 (file)
--- a/drivers/amlogic/media/osd/osd.h
+++ b/drivers/amlogic/media/osd/osd.h
@@ -276,6 +276,7 @@ enum cpuid_type_e {
        __MESON_CPU_MAJOR_ID_TXHD,
        __MESON_CPU_MAJOR_ID_G12A,
        __MESON_CPU_MAJOR_ID_G12B,
+       __MESON_CPU_MAJOR_ID_TL1,
        __MESON_CPU_MAJOR_ID_UNKNOWN,
 };
 
@@ -494,6 +495,8 @@ struct osd_device_data_s {
        u32 vpp_fifo_len;
        u32 dummy_data;
        u32 has_viu2;
+       u32 viu1_osd_count;
+       u32 viu2_index;
        struct clk *vpu_clkc;
 };
 

diff --git a/drivers/amlogic/media/osd/osd_antiflicker.c b/drivers/amlogic/media/osd/osd_antiflicker.c
index 37d0a02..cdcd26f 100644 (file)
--- a/drivers/amlogic/media/osd/osd_antiflicker.c
+++ b/drivers/amlogic/media/osd/osd_antiflicker.c
@@ -81,7 +81,7 @@ static int osd_antiflicker_process(void)
 
        mutex_lock(&osd_antiflicker_mutex);
 #ifdef CONFIG_AMLOGIC_MEDIA_CANVAS
-       if (get_cpu_type() != MESON_CPU_MAJOR_ID_AXG) {
+       if (osd_hw.osd_meson_dev.cpu_id != MESON_CPU_MAJOR_ID_AXG) {
                canvas_read(OSD1_CANVAS_INDEX, &cs);
                canvas_read(OSD1_CANVAS_INDEX, &cd);
                cs_addr = cs.addr;

diff --git a/drivers/amlogic/media/osd/osd_backup.c b/drivers/amlogic/media/osd/osd_backup.c
index 1bef589..64d9cd9 100644 (file)
--- a/drivers/amlogic/media/osd/osd_backup.c
+++ b/drivers/amlogic/media/osd/osd_backup.c
@@ -173,7 +173,7 @@ u32 is_backup(void)
 
 /* recovery section */
 #define INVAILD_REG_ITEM {0xffff, 0x0, 0x0, 0x0}
-#define REG_RECOVERY_TABLE 11
+#define REG_RECOVERY_TABLE 12
 
 static struct reg_recovery_table gRecovery[REG_RECOVERY_TABLE];
 static u32 recovery_enable;
@@ -409,7 +409,7 @@ static struct reg_item osd1_sc_recovery_table_g12a[] = {
        {VPP_OSD_SCALE_COEF, 0x0, 0xffffffff, 0}
 };
 
-static struct reg_item osd23_sc_recovery_table_g12a[] = {
+static struct reg_item osd2_sc_recovery_table_g12a[] = {
        {OSD2_VSC_PHASE_STEP, 0x0, 0x0fffffff, 1},
        {OSD2_VSC_INI_PHASE, 0x0, 0xffffffff, 1},
        {OSD2_VSC_CTRL0, 0x0, 0x01fb7b7f, 1},
@@ -436,10 +436,9 @@ static struct reg_item osd23_sc_recovery_table_g12a[] = {
        INVAILD_REG_ITEM, /* 0x3d17 */
        {OSD2_SCALE_COEF_IDX, 0x0, 0x0000c37f, 0},
        {OSD2_SCALE_COEF, 0x0, 0xffffffff, 0},
-       INVAILD_REG_ITEM, /* 0x3d1a */
-       INVAILD_REG_ITEM, /* 0x3d1b */
-       INVAILD_REG_ITEM, /* 0x3d1c */
-       INVAILD_REG_ITEM, /* 0x3d1d */
+};
+
+static struct reg_item osd3_sc_recovery_table_g12a[] = {
        {OSD34_SCALE_COEF_IDX, 0x0, 0x0000c37f, 0},
        {OSD34_SCALE_COEF, 0x0, 0xffffffff, 0},
        {OSD34_VSC_PHASE_STEP, 0x0, 0x0fffffff, 1},
@@ -765,12 +764,14 @@ static void recovery_regs_init_g12a(void)
        gRecovery[i].table =
                (struct reg_item *)&osd12_recovery_table_g12a[0];
 
-       i++;
-       gRecovery[i].base_addr = VIU_OSD3_CTRL_STAT;
-       gRecovery[i].size = sizeof(osd3_recovery_table_g12a)
-               / sizeof(struct reg_item);
-       gRecovery[i].table =
-               (struct reg_item *)&osd3_recovery_table_g12a[0];
+       if ((osd_hw.osd_meson_dev.viu1_osd_count - 1) == DEV_OSD3) {
+               i++;
+               gRecovery[i].base_addr = VIU_OSD3_CTRL_STAT;
+               gRecovery[i].size = sizeof(osd3_recovery_table_g12a)
+                       / sizeof(struct reg_item);
+               gRecovery[i].table =
+                       (struct reg_item *)&osd3_recovery_table_g12a[0];
+       }
 
        i++;
        gRecovery[i].base_addr = VPP_OSD_VSC_PHASE_STEP;
@@ -781,10 +782,19 @@ static void recovery_regs_init_g12a(void)
 
        i++;
        gRecovery[i].base_addr = OSD2_VSC_PHASE_STEP;
-       gRecovery[i].size = sizeof(osd23_sc_recovery_table_g12a)
+       gRecovery[i].size = sizeof(osd2_sc_recovery_table_g12a)
                / sizeof(struct reg_item);
        gRecovery[i].table =
-               (struct reg_item *)&osd23_sc_recovery_table_g12a[0];
+               (struct reg_item *)&osd2_sc_recovery_table_g12a[0];
+
+       if ((osd_hw.osd_meson_dev.viu1_osd_count - 1) == DEV_OSD3) {
+               i++;
+               gRecovery[i].base_addr = OSD34_SCALE_COEF_IDX;
+               gRecovery[i].size = sizeof(osd3_sc_recovery_table_g12a)
+                       / sizeof(struct reg_item);
+               gRecovery[i].table =
+                       (struct reg_item *)&osd3_sc_recovery_table_g12a[0];
+       }
 
        i++;
        gRecovery[i].base_addr = VPU_MAFBC_BLOCK_ID;
@@ -844,8 +854,7 @@ void recovery_regs_init(void)
                return;
        memset(gRecovery, 0, sizeof(gRecovery));
 
-       if ((cpu_id == __MESON_CPU_MAJOR_ID_G12A) ||
-               (cpu_id == __MESON_CPU_MAJOR_ID_G12B))
+       if (cpu_id >= __MESON_CPU_MAJOR_ID_G12A)
                recovery_regs_init_g12a();
        else
                recovery_regs_init_old();
@@ -1168,8 +1177,6 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                }
                break;
        case OSD2_VSC_PHASE_STEP:
-       case 0x3d10:
-       case OSD34_VSC_PHASE_STEP:
                /* osd2 osd 3 sc */
                base = gRecovery[3].base_addr;
                size = gRecovery[3].size;
@@ -1182,13 +1189,8 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_BLOCK_ID:
-               /* vpu mali common */
-               if (backup_enable &
-                       HW_RESET_MALI_AFBCD_REGS) {
-                       ret = 1;
-                       break;
-               }
+       case OSD34_VSC_PHASE_STEP:
+               /* osd2 osd 3 sc */
                base = gRecovery[4].base_addr;
                size = gRecovery[4].size;
                table = gRecovery[4].table;
@@ -1200,8 +1202,8 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S0:
-               /* vpu mali src0 */
+       case VPU_MAFBC_BLOCK_ID:
+               /* vpu mali common */
                if (backup_enable &
                        HW_RESET_MALI_AFBCD_REGS) {
                        ret = 1;
@@ -1218,8 +1220,8 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S1:
-               /* vpu mali src1 */
+       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S0:
+               /* vpu mali src0 */
                if (backup_enable &
                        HW_RESET_MALI_AFBCD_REGS) {
                        ret = 1;
@@ -1236,8 +1238,8 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S2:
-               /* vpu mali src2 */
+       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S1:
+               /* vpu mali src1 */
                if (backup_enable &
                        HW_RESET_MALI_AFBCD_REGS) {
                        ret = 1;
@@ -1254,9 +1256,13 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                        ret = 0;
                }
                break;
-       case VIU_OSD_BLEND_CTRL:
-       case VIU_OSD_BLEND_CTRL1:
-               /* osd blend ctrl */
+       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S2:
+               /* vpu mali src2 */
+               if (backup_enable &
+                       HW_RESET_MALI_AFBCD_REGS) {
+                       ret = 1;
+                       break;
+               }
                base = gRecovery[8].base_addr;
                size = gRecovery[8].size;
                table = gRecovery[8].table;
@@ -1268,8 +1274,9 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                        ret = 0;
                }
                break;
-       case VPP_VD2_HDR_IN_SIZE:
-               /* vpp blend ctrl */
+       case VIU_OSD_BLEND_CTRL:
+       case VIU_OSD_BLEND_CTRL1:
+               /* osd blend ctrl */
                base = gRecovery[9].base_addr;
                size = gRecovery[9].size;
                table = gRecovery[9].table;
@@ -1281,6 +1288,19 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                        ret = 0;
                }
                break;
+       case VPP_VD2_HDR_IN_SIZE:
+               /* vpp blend ctrl */
+               base = gRecovery[10].base_addr;
+               size = gRecovery[10].size;
+               table = gRecovery[10].table;
+               if ((addr >= base) &&
+                       (addr < base + size)) {
+                       table[addr - base].val = value;
+                       if (table[addr - base].recovery)
+                               table[addr - base].recovery = 1;
+                       ret = 0;
+               }
+               break;
        default:
                break;
        }
@@ -1294,8 +1314,8 @@ static int update_recovery_item_g12a(u32 addr, u32 value)
                (addr == VIU_OSD2_MALI_UNPACK_CTRL) ||
                (addr == DOLBY_CORE2A_SWAP_CTRL1) ||
                (addr == DOLBY_CORE2A_SWAP_CTRL2)) {
-               table = gRecovery[10].table;
-               for (i = 0; i <  gRecovery[10].size; i++) {
+               table = gRecovery[11].table;
+               for (i = 0; i <  gRecovery[11].size; i++) {
                        if (addr == table[i].addr) {
                                table[i].val = value;
                                if (table[i].recovery)
@@ -1383,9 +1403,7 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                }
                break;
        case OSD2_VSC_PHASE_STEP:
-       case 0x3d10:
-       case OSD34_VSC_PHASE_STEP:
-               /* osd2 osd 3 sc */
+               /* osd2 */
                base = gRecovery[3].base_addr;
                size = gRecovery[3].size;
                table = gRecovery[3].table;
@@ -1395,13 +1413,8 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_BLOCK_ID:
-               /* vpu mali common */
-               if (backup_enable &
-                       HW_RESET_MALI_AFBCD_REGS) {
-                       ret = 2;
-                       break;
-               }
+       case OSD34_VSC_PHASE_STEP:
+               /* osd3 sc */
                base = gRecovery[4].base_addr;
                size = gRecovery[4].size;
                table = gRecovery[4].table;
@@ -1411,8 +1424,8 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S0:
-               /* vpu mali src0 */
+       case VPU_MAFBC_BLOCK_ID:
+               /* vpu mali common */
                if (backup_enable &
                        HW_RESET_MALI_AFBCD_REGS) {
                        ret = 2;
@@ -1427,8 +1440,8 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S1:
-               /* vpu mali src1 */
+       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S0:
+               /* vpu mali src0 */
                if (backup_enable &
                        HW_RESET_MALI_AFBCD_REGS) {
                        ret = 2;
@@ -1443,8 +1456,8 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                        ret = 0;
                }
                break;
-       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S2:
-               /* vpu mali src2 */
+       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S1:
+               /* vpu mali src1 */
                if (backup_enable &
                        HW_RESET_MALI_AFBCD_REGS) {
                        ret = 2;
@@ -1459,9 +1472,13 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                        ret = 0;
                }
                break;
-       case VIU_OSD_BLEND_CTRL:
-       case VIU_OSD_BLEND_CTRL1:
-               /* osd blend ctrl */
+       case VPU_MAFBC_HEADER_BUF_ADDR_LOW_S2:
+               /* vpu mali src2 */
+               if (backup_enable &
+                       HW_RESET_MALI_AFBCD_REGS) {
+                       ret = 2;
+                       break;
+               }
                base = gRecovery[8].base_addr;
                size = gRecovery[8].size;
                table = gRecovery[8].table;
@@ -1471,8 +1488,9 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                        ret = 0;
                }
                break;
-       case VPP_VD2_HDR_IN_SIZE:
-               /* vpp blend ctrl */
+       case VIU_OSD_BLEND_CTRL:
+       case VIU_OSD_BLEND_CTRL1:
+               /* osd blend ctrl */
                base = gRecovery[9].base_addr;
                size = gRecovery[9].size;
                table = gRecovery[9].table;
@@ -1482,6 +1500,17 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                        ret = 0;
                }
                break;
+       case VPP_VD2_HDR_IN_SIZE:
+               /* vpp blend ctrl */
+               base = gRecovery[10].base_addr;
+               size = gRecovery[10].size;
+               table = gRecovery[10].table;
+               if ((addr >= base) &&
+                       (addr < base + size)) {
+                       table += (addr - base);
+                       ret = 0;
+               }
+               break;
        default:
                break;
        }
@@ -1495,8 +1524,8 @@ static s32 get_recovery_item_g12a(u32 addr, u32 *value, u32 *mask)
                (addr == VIU_OSD2_MALI_UNPACK_CTRL) ||
                (addr == DOLBY_CORE2A_SWAP_CTRL1) ||
                (addr == DOLBY_CORE2A_SWAP_CTRL2)) {
-               table = gRecovery[10].table;
-               for (i = 0; i <  gRecovery[10].size; i++) {
+               table = gRecovery[11].table;
+               for (i = 0; i <  gRecovery[11].size; i++) {
                        if (addr == table[i].addr) {
                                table += i;
                                ret = 0;
@@ -1540,8 +1569,7 @@ int update_recovery_item(u32 addr, u32 value)
        if (!recovery_enable)
                return ret;
 
-       if ((cpu_id == __MESON_CPU_MAJOR_ID_G12A) ||
-               (cpu_id == __MESON_CPU_MAJOR_ID_G12B))
+       if (cpu_id >= __MESON_CPU_MAJOR_ID_G12A)
                ret = update_recovery_item_g12a(addr, value);
        else
                ret = update_recovery_item_old(addr, value);
@@ -1557,8 +1585,7 @@ s32 get_recovery_item(u32 addr, u32 *value, u32 *mask)
        if (!recovery_enable)
                return ret;
 
-       if ((cpu_id == __MESON_CPU_MAJOR_ID_G12A) ||
-               (cpu_id == __MESON_CPU_MAJOR_ID_G12B))
+       if (cpu_id >= __MESON_CPU_MAJOR_ID_G12A)
                ret = get_recovery_item_g12a(addr, value, mask);
        else
                ret = get_recovery_item_old(addr, value, mask);

diff --git a/drivers/amlogic/media/osd/osd_clone.c b/drivers/amlogic/media/osd/osd_clone.c
index b9cbfc3..533f8cd 100644 (file)
--- a/drivers/amlogic/media/osd/osd_clone.c
+++ b/drivers/amlogic/media/osd/osd_clone.c
@@ -73,7 +73,7 @@ static void osd_clone_process(void)
        struct config_para_ex_s *ge2d_config = &s_osd_clone.ge2d_config;
        struct ge2d_context_s *context = s_osd_clone.ge2d_context;
 #ifdef CONFIG_AMLOGIC_MEDIA_CANVAS
-       if (get_cpu_type() != MESON_CPU_MAJOR_ID_AXG) {
+       if (osd_hw.osd_meson_dev.cpu_id != MESON_CPU_MAJOR_ID_AXG) {
                canvas_read(OSD1_CANVAS_INDEX, &cs);
                canvas_read(OSD2_CANVAS_INDEX, &cd);
                cs_addr = cs.addr;

diff --git a/drivers/amlogic/media/osd/osd_drm.c b/drivers/amlogic/media/osd/osd_drm.c
index ecf02eb..91d7d76 100644 (file)
--- a/drivers/amlogic/media/osd/osd_drm.c
+++ b/drivers/amlogic/media/osd/osd_drm.c
@@ -745,7 +745,7 @@ void osd_drm_vsync_isr_handler(void)
                osd_update_vsync_hit();
                osd_hw_reset();
        } else {
-               if (get_cpu_type() != __MESON_CPU_MAJOR_ID_AXG)
+               if (osd_hw.osd_meson_dev.cpu_id != __MESON_CPU_MAJOR_ID_AXG)
                        osd_rdma_interrupt_done_clear();
                else {
                        osd_update_scan_mode();

diff --git a/drivers/amlogic/media/osd/osd_fb.c b/drivers/amlogic/media/osd/osd_fb.c
index 518c712..2b0c977 100644 (file)
--- a/drivers/amlogic/media/osd/osd_fb.c
+++ b/drivers/amlogic/media/osd/osd_fb.c
@@ -1407,8 +1407,7 @@ static int malloc_osd_memory(struct fb_info *info)
        /* clear osd buffer if not logo layer */
        if (((logo_index < 0) || (logo_index != fb_index)) ||
                (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_AXG) ||
-               (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_G12A) ||
-               ((osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_G12B))) {
+               (osd_meson_dev.cpu_id >= __MESON_CPU_MAJOR_ID_G12A)) {
                osd_log_info("---------------clear fb%d memory %p\n",
                        fb_index, fbdev->fb_mem_vaddr);
                set_logo_loaded();
@@ -1680,7 +1679,7 @@ int osd_notify_callback(struct notifier_block *block, unsigned long cmd,
        switch (cmd) {
        case  VOUT_EVENT_MODE_CHANGE:
                set_osd_logo_freescaler();
-               for (i = 0; i < osd_meson_dev.osd_count; i++) {
+               for (i = 0; i < osd_meson_dev.viu1_osd_count; i++) {
                        fb_dev = gp_fbdev_list[i];
                        if (fb_dev == NULL)
                                continue;
@@ -1702,7 +1701,7 @@ int osd_notify_callback(struct notifier_block *block, unsigned long cmd,
                break;
        case VOUT_EVENT_OSD_BLANK:
                blank = *(int *)para;
-               for (i = 0; i < osd_meson_dev.osd_count; i++) {
+               for (i = 0; i < osd_meson_dev.viu1_osd_count; i++) {
                        fb_dev = gp_fbdev_list[i];
                        if (fb_dev == NULL)
                                continue;
@@ -1713,7 +1712,7 @@ int osd_notify_callback(struct notifier_block *block, unsigned long cmd,
                break;
        case VOUT_EVENT_OSD_DISP_AXIS:
                disp_rect = (struct disp_rect_s *)para;
-               for (i = 0; i < osd_meson_dev.osd_count; i++) {
+               for (i = 0; i < osd_meson_dev.viu1_osd_count; i++) {
                        if (!disp_rect)
                                break;
 
@@ -1780,7 +1779,7 @@ int osd_notify_callback_viu2(struct notifier_block *block, unsigned long cmd,
                vinfo->name, cmd);
        if (!strcmp(vinfo->name, "invalid"))
                return -1;
-       i = osd_meson_dev.osd_count - 1;
+       i = osd_meson_dev.viu2_index;
        switch (cmd) {
        case  VOUT_EVENT_MODE_CHANGE:
                fb_dev = gp_fbdev_list[i];
@@ -3295,11 +3294,19 @@ static void mem_free_work(struct work_struct *work)
                        osd_page[0],
                        fb_memsize[0] >> PAGE_SHIFT);
 #else
+#ifdef CONFIG_ARM64
                long r = -EINVAL;
+#elif defined(CONFIG_ARM) && defined(CONFIG_HIGHMEM)
+               unsigned long r;
+#endif
                unsigned long start_addr;
                unsigned long end_addr;
 
+#ifdef CONFIG_ARM64
                if (fb_rmem.base && fb_map_flag) {
+#elif defined(CONFIG_ARM) && defined(CONFIG_HIGHMEM)
+               if (fb_rmem.base) {
+#endif
                        if (fb_rmem.size >= (fb_memsize[0] + fb_memsize[1]
                                + fb_memsize[2])) {
                                /* logo memory before fb0/fb1 memory, free it*/
@@ -3312,8 +3319,16 @@ static void mem_free_work(struct work_struct *work)
                        }
                        osd_log_info("%s, free memory: addr:%lx\n",
                                __func__, start_addr);
+#ifdef CONFIG_ARM64
                        r = free_reserved_area(__va(start_addr),
                                __va(end_addr), 0, "fb-memory");
+#elif defined(CONFIG_ARM) && defined(CONFIG_HIGHMEM)
+                       for (r = start_addr; r < end_addr; ) {
+                               free_highmem_page(phys_to_page(r));
+                               r += PAGE_SIZE;
+                       }
+#endif
+
                }
 #endif
        }
@@ -3455,6 +3470,21 @@ static struct osd_device_data_s osd_g12b = {
        .has_viu2 = 1,
 };
 
+static struct osd_device_data_s osd_tl1 = {
+       .cpu_id = __MESON_CPU_MAJOR_ID_TL1,
+       .osd_ver = OSD_HIGH_ONE,
+       .afbc_type = MALI_AFBC,
+       .osd_count = 3,
+       .has_deband = 1,
+       .has_lut = 1,
+       .has_rdma = 1,
+       .has_dolby_vision = 0,
+       .osd_fifo_len = 64, /* fifo len 64*8 = 512 */
+       .vpp_fifo_len = 0xfff,/* 2048 */
+       .dummy_data = 0x00808000,
+       .has_viu2 = 1,
+};
+
 static const struct of_device_id meson_fb_dt_match[] = {
        {
                .compatible = "amlogic, meson-gxbb",
@@ -3497,6 +3527,10 @@ static const struct of_device_id meson_fb_dt_match[] = {
                .compatible = "amlogic, meson-g12b",
                .data = &osd_g12b,
        },
+       {
+               .compatible = "amlogic, meson-tl1",
+               .data = &osd_tl1,
+       },
        {},
 };
 
@@ -3571,6 +3605,12 @@ static int osd_probe(struct platform_device *pdev)
                        goto failed1;
                }
        }
+       osd_meson_dev.viu1_osd_count = osd_meson_dev.osd_count;
+       if (osd_meson_dev.has_viu2) {
+               /* set viu1 osd count */
+               osd_meson_dev.viu1_osd_count--;
+               osd_meson_dev.viu2_index = osd_meson_dev.viu1_osd_count;
+       }
 
        ret = osd_io_remap(osd_meson_dev.osd_ver == OSD_SIMPLE);
        if (!ret) {
@@ -3739,12 +3779,12 @@ static int osd_probe(struct platform_device *pdev)
                /* register frame buffer */
                register_framebuffer(fbi);
                /* create device attribute files */
-               if (index <= DEV_OSD2) {
+               if (index <= (osd_meson_dev.viu1_osd_count - 1)) {
                        for (i = 0; i < ARRAY_SIZE(osd_attrs); i++)
                                ret = device_create_file(
                                fbi->dev, &osd_attrs[i]);
-               } else if ((osd_meson_dev.osd_ver == OSD_HIGH_ONE) &&
-                       (index == DEV_OSD3)) {
+               } else if ((osd_meson_dev.has_viu2) &&
+                       (index == osd_meson_dev.viu2_index)) {
                        for (i = 0; i < ARRAY_SIZE(osd_attrs_viu2); i++)
                        ret = device_create_file(fbi->dev, &osd_attrs_viu2[i]);
                }
@@ -3758,12 +3798,12 @@ static int osd_probe(struct platform_device *pdev)
 
        /* init osd reverse */
        if (osd_info.index == DEV_ALL) {
-               for (i = 0; i < osd_meson_dev.osd_count - 1; i++)
+               for (i = 0; i < osd_meson_dev.viu1_osd_count; i++)
                        osd_set_reverse_hw(i, osd_info.osd_reverse, 1);
                osd_set_reverse_hw(i, osd_info.osd_reverse, 0);
-       } else if (osd_info.index <= DEV_OSD2)
+       } else if (osd_info.index <= osd_meson_dev.viu1_osd_count - 1)
                osd_set_reverse_hw(osd_info.index, osd_info.osd_reverse, 1);
-       else if (osd_info.index == DEV_OSD3)
+       else if (osd_info.index == osd_meson_dev.viu2_index)
                osd_set_reverse_hw(osd_info.index, osd_info.osd_reverse, 0);
        /* register vout client */
        vout_register_client(&osd_notifier_nb);
@@ -3808,12 +3848,12 @@ static int osd_remove(struct platform_device *pdev)
                        struct osd_fb_dev_s *fbdev = gp_fbdev_list[i];
 
                        fbi = fbdev->fb_info;
-                       if (i <= DEV_OSD2) {
+                       if (i <= osd_meson_dev.viu1_osd_count - 1) {
                                for (j = 0; j < ARRAY_SIZE(osd_attrs); j++)
                                        device_remove_file(
                                        fbi->dev, &osd_attrs[j]);
-                       } else if ((osd_meson_dev.osd_ver == OSD_HIGH_ONE) &&
-                               (i == DEV_OSD3)) {
+                       } else if ((osd_meson_dev.has_viu2) &&
+                               (i == osd_meson_dev.viu2_index)) {
                                for (j = 0; j < ARRAY_SIZE(osd_attrs_viu2); j++)
                                        device_remove_file(
                                        fbi->dev, &osd_attrs_viu2[j]);

diff --git a/drivers/amlogic/media/osd/osd_hw.c b/drivers/amlogic/media/osd/osd_hw.c
index cfc69d6..93e5ebd 100644 (file)
--- a/drivers/amlogic/media/osd/osd_hw.c
+++ b/drivers/amlogic/media/osd/osd_hw.c
@@ -1554,7 +1554,7 @@ void osd_update_scan_mode(void)
        } else {
                int i;
 
-               for (i = 0; i < osd_hw.osd_meson_dev.osd_count; i++) {
+               for (i = 0; i < osd_hw.osd_meson_dev.viu1_osd_count; i++) {
                        if (osd_hw.free_scale_enable[i])
                                osd_hw.scan_mode[i] = SCAN_MODE_PROGRESSIVE;
                        if (osd_hw.osd_afbcd[i].enable)
@@ -1631,9 +1631,10 @@ static u32 osd_get_hw_reset_flag(void)
                }
 #endif
                break;
-#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
        case __MESON_CPU_MAJOR_ID_GXL:
        case __MESON_CPU_MAJOR_ID_TXL:
+#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
+
                if (((hdr_osd_reg.viu_osd1_matrix_ctrl & 0x00000001)
                        != 0x0) ||
                        ((hdr_osd_reg.viu_osd1_eotf_ctl & 0x80000000)
@@ -1646,10 +1647,11 @@ static u32 osd_get_hw_reset_flag(void)
                        hw_reset_flag |= HW_RESET_OSD1_REGS;
                        osd_hdr_on = false;
                }
-               break;
 #endif
+               break;
        case __MESON_CPU_MAJOR_ID_G12A:
        case __MESON_CPU_MAJOR_ID_G12B:
+       case __MESON_CPU_MAJOR_ID_TL1:
                {
                int i, afbc_enable = 0;
 
@@ -5226,14 +5228,13 @@ static int get_available_layers(void)
        int i;
        int available_layer = 0;
 
-       for (i = 0 ; i < osd_hw.osd_meson_dev.osd_count - 1; i++) {
+       for (i = 0 ; i < osd_hw.osd_meson_dev.viu1_osd_count; i++) {
                if (osd_hw.enable[i])
                        available_layer++;
        }
        return available_layer;
 }
 
-
 static u32 blend_din_to_osd(
        u32 blend_din_index, struct hw_osd_blending_s *blending)
 {
@@ -5360,9 +5361,9 @@ static void exchange_vpp_order(struct hw_osd_blending_s *blending)
 static void generate_blend_din_table(struct hw_osd_blending_s *blending)
 {
        int i = 0;
-       int osd_count = osd_hw.osd_meson_dev.osd_count - 1;
        int temp1 = 0, temp2 = 0;
        u32 max_order = 0, min_order = 0;
+       int osd_count = osd_hw.osd_meson_dev.viu1_osd_count;
 
        /* reorder[i] = osd[i]'s display layer */
        for (i = 0; i < OSD_BLEND_LAYERS; i++)
@@ -5814,7 +5815,7 @@ static void set_blend_order(struct hw_osd_blending_s *blending)
 {
        u32 org_order[HW_OSD_COUNT];
        int i = 0, j = 0;
-       u32 osd_count = osd_hw.osd_meson_dev.osd_count - 1;
+       u32 osd_count = osd_hw.osd_meson_dev.viu1_osd_count;
 
        if (!blending)
                return;
@@ -7214,11 +7215,8 @@ static void set_blend_reg(struct layer_blend_reg_s *blend_reg)
 {
        int i;
        u32 reg_offset = 2;
-#ifdef OSD_BLEND_SHIFT_WORKAROUND
-       u32 osd_count = osd_hw.osd_meson_dev.osd_count;
-#else
-       u32 osd_count = osd_hw.osd_meson_dev.osd_count - 1;
-#endif
+       u32 osd_count = osd_hw.osd_meson_dev.viu1_osd_count;
+
        if (!blend_reg)
                return;
        /* osd blend ctrl */
@@ -7286,7 +7284,7 @@ static int osd_setting_order(void)
        int i;
        struct layer_blend_reg_s *blend_reg;
        struct hw_osd_blending_s *blending;
-       u32 osd_count = osd_hw.osd_meson_dev.osd_count - 1;
+       u32 osd_count = osd_hw.osd_meson_dev.viu1_osd_count;
        bool update = false;
        int line1;
        int line2;
@@ -8171,8 +8169,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
        else if ((osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_GXL)
                && (osd_meson->cpu_id <= __MESON_CPU_MAJOR_ID_TXL))
                backup_regs_init(HW_RESET_OSD1_REGS);
-       else if ((osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_G12A)
-               || (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_G12B))
+       else if (osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_G12A)
                backup_regs_init(HW_RESET_MALI_AFBCD_REGS);
        else
                backup_regs_init(HW_RESET_NONE);
@@ -8237,7 +8234,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
                /* fifo_depth_val: 32 or 64 *8 = 256 or 512 */
                data32 |= (osd_hw.osd_meson_dev.osd_fifo_len
                        & 0xfffffff) << 12;
-               for (idx = 0; idx < osd_hw.osd_meson_dev.osd_count - 1; idx++)
+               for (idx = 0; idx < osd_hw.osd_meson_dev.viu1_osd_count; idx++)
                        osd_reg_write(
                        hw_osd_reg_array[idx].osd_fifo_ctrl_stat, data32);
                /* osd_reg_write(VIU_OSD2_FIFO_CTRL_STAT, data32_); */
@@ -8256,7 +8253,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
                /* just disable osd to avoid booting hang up */
                data32 = 0x1 << 0;
                data32 |= OSD_GLOBAL_ALPHA_DEF << 12;
-               for (idx = 0; idx < osd_hw.osd_meson_dev.osd_count - 1; idx++)
+               for (idx = 0; idx < osd_hw.osd_meson_dev.viu1_osd_count; idx++)
                        osd_reg_write(
                                hw_osd_reg_array[idx].osd_ctrl_stat, data32);
        }
@@ -8314,7 +8311,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
                                        data32 | 0x800000);
                        }
 
-                       if (idx < osd_hw.osd_meson_dev.osd_count - 1) {
+                       if (idx < osd_hw.osd_meson_dev.viu1_osd_count) {
                                /* TODO: temp set at here,
                                 * need move it to uboot
                                 */
@@ -8519,7 +8516,7 @@ void osd_init_viu2(void)
        /* fifo_depth_val: 32 or 64 *8 = 256 or 512 */
        data32 |= (osd_hw.osd_meson_dev.osd_fifo_len
                & 0xfffffff) << 12;
-       idx = osd_hw.osd_meson_dev.osd_count - 1;
+       idx = osd_hw.osd_meson_dev.viu2_index;
        osd_reg_write(
                hw_osd_reg_array[idx].osd_fifo_ctrl_stat, data32);
        /* osd_reg_write(VIU_OSD2_FIFO_CTRL_STAT, data32_); */