[X86][SSE] Add tests showing missing SimplifyDemandedVectorElts support for X86ISD...

llvm-svn: 353164

diff --git a/llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll b/llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll
index 698e5bc..d465adc 100644 (file)
--- a/llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll
@@ -77,7 +77,67 @@ define <8 x i16> @test3_x86_sse41_pblend_w(<8 x i16> %a0) {
   ret <8 x i16> %1
 }
 
+define double @demanded_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
+; CHECK-LABEL: demanded_blendvpd:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movddup {{.*#+}} xmm3 = xmm0[0,0]
+; CHECK-NEXT:    movddup {{.*#+}} xmm1 = xmm1[0,0]
+; CHECK-NEXT:    movddup {{.*#+}} xmm0 = xmm2[0,0]
+; CHECK-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
+; CHECK-NEXT:    movapd %xmm3, %xmm0
+; CHECK-NEXT:    retq
+  %1 = shufflevector <2 x double> %a0, <2 x double> undef, <2 x i32> zeroinitializer
+  %2 = shufflevector <2 x double> %a1, <2 x double> undef, <2 x i32> zeroinitializer
+  %3 = shufflevector <2 x double> %a2, <2 x double> undef, <2 x i32> zeroinitializer
+  %4 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %1, <2 x double> %2, <2 x double> %3)
+  %5 = extractelement <2 x double> %4, i32 0
+  ret double %5
+}
+
+define float @demanded_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
+; CHECK-LABEL: demanded_blendvps:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movaps %xmm0, %xmm3
+; CHECK-NEXT:    shufps {{.*#+}} xmm3 = xmm3[0,0],xmm0[0,0]
+; CHECK-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,0,0,0]
+; CHECK-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,0,0,0]
+; CHECK-NEXT:    movaps %xmm2, %xmm0
+; CHECK-NEXT:    blendvps %xmm0, %xmm1, %xmm3
+; CHECK-NEXT:    movaps %xmm3, %xmm0
+; CHECK-NEXT:    retq
+  %1 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> zeroinitializer
+  %2 = shufflevector <4 x float> %a1, <4 x float> undef, <4 x i32> zeroinitializer
+  %3 = shufflevector <4 x float> %a2, <4 x float> undef, <4 x i32> zeroinitializer
+  %4 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %1, <4 x float> %2, <4 x float> %3)
+  %5 = extractelement <4 x float> %4, i32 0
+  ret float %5
+}
+
+define <16 x i8> @demanded_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
+; CHECK-LABEL: demanded_pblendvb:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movdqa %xmm0, %xmm3
+; CHECK-NEXT:    pxor %xmm4, %xmm4
+; CHECK-NEXT:    pshufb %xmm4, %xmm3
+; CHECK-NEXT:    pshufb %xmm4, %xmm1
+; CHECK-NEXT:    pshufb %xmm4, %xmm2
+; CHECK-NEXT:    movdqa %xmm2, %xmm0
+; CHECK-NEXT:    pblendvb %xmm0, %xmm1, %xmm3
+; CHECK-NEXT:    pshufb %xmm4, %xmm3
+; CHECK-NEXT:    movdqa %xmm3, %xmm0
+; CHECK-NEXT:    retq
+  %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <16 x i32> zeroinitializer
+  %2 = shufflevector <16 x i8> %a1, <16 x i8> undef, <16 x i32> zeroinitializer
+  %3 = shufflevector <16 x i8> %a2, <16 x i8> undef, <16 x i32> zeroinitializer
+  %4 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %1, <16 x i8> %2, <16 x i8> %3)
+  %5 = shufflevector <16 x i8> %4, <16 x i8> undef, <16 x i32> zeroinitializer
+  ret <16 x i8> %5
+}
+
 declare <2 x double> @llvm.x86.sse41.blendpd(<2 x double>, <2 x double>, i32)
 declare <4 x float> @llvm.x86.sse41.blendps(<4 x float>, <4 x float>, i32)
 declare <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16>, <8 x i16>, i32)
 
+declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>)
+declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>)
+declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>)