if test "$hax" = "yes" ; then
if test "$mingw32" = "yes" ; then
echo "CONFIG_HAX_BACKEND=y" >> $config_host_mak
+ elif test "$darwin" = "yes" ; then
+ echo "CONFIG_HAX_BACKEND=y" >> $config_host_mak
else
hax="no"
fi
cpu_loop_exit(env);
} else if (interrupt_request & CPU_INTERRUPT_SIPI) {
do_cpu_sipi(x86_env_get_cpu(env));
+
} else if (env->hflags2 & HF2_GIF_MASK) {
if ((interrupt_request & CPU_INTERRUPT_SMI) &&
!(env->hflags & HF_SMM_MASK)) {
cpu_svm_check_intercept_param(env, SVM_EXIT_SMI,
0);
env->interrupt_request &= ~CPU_INTERRUPT_SMI;
+#ifdef CONFIG_HAX
+ if (hax_enabled())
+ env->hax_vcpu->resync = 1;
+#endif
do_smm_enter(env);
next_tb = 0;
} else if ((interrupt_request & CPU_INTERRUPT_NMI) &&
- !(env->hflags2 & HF2_NMI_MASK)) {
+ !(env->hflags2 & HF2_NMI_MASK)) {
env->interrupt_request &= ~CPU_INTERRUPT_NMI;
env->hflags2 |= HF2_NMI_MASK;
do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);
*/
static int hax_stop_tbloop(CPUArchState *env)
{
- switch (env->hax_vcpu->emulation_state)
- {
- case HAX_EMULATE_STATE_MMIO:
- return 1;
- break;
- case HAX_EMULATE_STATE_INITIAL:
+ switch (env->hax_vcpu->emulation_state)
+ {
+ case HAX_EMULATE_STATE_MMIO:
+ if (env->hax_vcpu->resync) {
+ hax_prepare_emulation(env);
+ env->hax_vcpu->resync = 0;
+ return 0;
+ }
+ return 1;
+ break;
+ case HAX_EMULATE_STATE_INITIAL:
case HAX_EMULATE_STATE_REAL:
- if (!hax_vcpu_emulation_mode(env))
- return 1;
+ if (!hax_vcpu_emulation_mode(env))
+ return 1;
break;
default:
dprint("Invalid emulation state in hax_sto_tbloop state %x\n",
{
}
+static void hax_begin(MemoryListener *listener)
+{
+}
+
+static void hax_commit(MemoryListener *listener)
+{
+}
+
+static void hax_region_nop(MemoryListener *listener,
+ MemoryRegionSection *section)
+{
+}
static MemoryListener hax_memory_listener = {
+ .begin = hax_begin,
+ .commit = hax_commit,
.region_add = hax_region_add,
.region_del = hax_region_del,
+ .region_nop = hax_region_nop,
.log_start = hax_log_start,
.log_stop = hax_log_stop,
.log_sync = hax_log_sync,
return 0;
}
-int hax_set_phys_mem(target_phys_addr_t start_addr, ram_addr_t size, ram_addr_t phys_offset)
+int hax_set_phys_mem(MemoryRegionSection *section)
{
- struct hax_set_ram_info info, *pinfo = &info;
+ struct hax_set_ram_info info, *pinfo = &info;
+ MemoryRegionSection *mr = section->mr;
+ target_phys_addr_t start_addr = section->offset_within_address_space;
+ ram_addr_t size = section->size;
int ret;
- ram_addr_t flags = phys_offset & ~TARGET_PAGE_MASK;
-
- /* We only care for the RAM and ROM */
- if (flags >= IO_MEM_UNASSIGNED)
- return 0;
+ /*We only care for the RAM and ROM*/
+ if(!memory_region_is_ram(mr))
+ return 0;
+
if ( (start_addr & ~TARGET_PAGE_MASK) || (size & ~TARGET_PAGE_MASK))
{
dprint("set_phys_mem %x %lx requires page aligned addr and size\n", start_addr, size);
info.pa_start = start_addr;
info.size = size;
- info.va = (uint64_t)qemu_get_ram_ptr(phys_offset);
- info.flags = (flags & IO_MEM_ROM) ? 1 : 0;
+ info.va = (uint64_t)(memory_region_get_ram_ptr(mr) + section->offset_within_region);
+ info.flags = memory_region_is_rom(mr) ? 1 : 0;
ret = ioctl(hax_global.vm->fd, HAX_VM_IOCTL_SET_RAM, pinfo);
if (ret < 0)
dprint("has set phys mem failed\n");
exit(1);
}
+
return ret;
+
}
+
+
int hax_capability(struct hax_state *hax, struct hax_capabilityinfo *cap)
{
int ret;
return ret;
}
-int hax_sync_fpu(CPUState *env, struct fx_layout *fl, int set)
+int hax_sync_fpu(CPUArchState *env, struct fx_layout *fl, int set)
{
int ret, fd;
return ret;
}
-int hax_sync_msr(CPUState *env, struct hax_msr_data *msrs, int set)
+int hax_sync_msr(CPUArchState *env, struct hax_msr_data *msrs, int set)
{
int ret, fd;
return ret;
}
-int hax_sync_vcpu_state(CPUState *env, struct vcpu_state_t *state, int set)
+int hax_sync_vcpu_state(CPUArchState *env, struct vcpu_state_t *state, int set)
{
int ret, fd;
return ret;
}
-int hax_inject_interrupt(CPUState *env, int vector)
+int hax_inject_interrupt(CPUArchState *env, int vector)
{
int ret, fd;
{
hax_fd fd;
int vcpu_id;
+ int resync;
int emulation_state;
struct hax_tunnel *tunnel;
unsigned char *iobuf;
info.pa_start = start_addr;
info.size = size;
- info.va = (uint64_t)memory_region_get_ram_ptr(mr);
+ info.va = (uint64_t)(memory_region_get_ram_ptr(mr) +
+ section->offset_within_region);
info.flags = memory_region_is_rom(mr) ? 1 : 0;
hDeviceVM = hax_global.vm->fd;
# for TIZEN-maru board
obj-y += maru_arm_soc.o
+
+ifndef CONFIG_DARWIN
obj-y += maru_arm_board.o
+endif
+
obj-y += maru_arm_vpci.o
-obj-y += maru_arm_pmu.o
\ No newline at end of file
+obj-y += maru_arm_pmu.o
{\r
/* use minimum FPS(maximum frameinterval)\r
with non-VT system */\r
+#ifdef CONFIG_HAX\r
if (!hax_enabled()) {\r
pvi->AvgTimePerFrame =\r
(REFERENCE_TIME)scc.MaxFrameInterval;\r
pvi->AvgTimePerFrame =\r
(REFERENCE_TIME)MARUCAM_DEFAULT_FRAMEINTERVAL;\r
}\r
+#else\r
+ pvi->AvgTimePerFrame =\r
+ (REFERENCE_TIME)scc.MaxFrameInterval;\r
+#endif\r
hr = pSConfig->lpVtbl->SetFormat(pSConfig, pmtConfig);\r
DeleteMediaType(pmtConfig);\r
break;\r