+2003-05-07 Jeff Sturm <jsturm@one-point.com>
+
+ Fixes PR bootstrap/10656
+ * configure.in (HAVE_AS_REGISTER_PSEUDO_OP): Test assembler
+ support for .register pseudo-op.
+ * src/sparc/v8.S: Use it.
+ * fficonfig.h.in: Rebuilt.
+ * configure: Rebuilt.
+
2003-04-18 Jakub Jelinek <jakub@redhat.com>
* include/ffi.h.in (POWERPC64): Define if 64-bit.
EOF
fi
+
+ echo $ac_n "checking assembler .register pseudo-op support""... $ac_c" 1>&6
+echo "configure:3600: checking assembler .register pseudo-op support" >&5
+if eval "test \"`echo '$''{'libffi_cv_as_register_pseudo_op'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+
+ libffi_cv_as_register_pseudo_op=unknown
+ # Check if we have .register
+ cat > conftest.$ac_ext <<EOF
+#line 3608 "configure"
+#include "confdefs.h"
+asm (".register %g2, #scratch");
+int main() {
+
+; return 0; }
+EOF
+if { (eval echo configure:3615: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ libffi_cv_as_register_pseudo_op=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ libffi_cv_as_register_pseudo_op=no
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$libffi_cv_as_register_pseudo_op" 1>&6
+ if test "x$libffi_cv_as_register_pseudo_op" = xyes; then
+ cat >> confdefs.h <<\EOF
+#define HAVE_AS_REGISTER_PSEUDO_OP 1
+EOF
+
+ fi
fi
AC_DEFINE(HAVE_AS_SPARC_UA_PCREL, 1,
[Define if your assembler and linker support unaligned PC relative relocs.])
fi
+
+ AC_CACHE_CHECK([assembler .register pseudo-op support],
+ libffi_cv_as_register_pseudo_op, [
+ libffi_cv_as_register_pseudo_op=unknown
+ # Check if we have .register
+ AC_TRY_COMPILE([asm (".register %g2, #scratch");],,
+ [libffi_cv_as_register_pseudo_op=yes],
+ [libffi_cv_as_register_pseudo_op=no])
+ ])
+ if test "x$libffi_cv_as_register_pseudo_op" = xyes; then
+ AC_DEFINE(HAVE_AS_REGISTER_PSEUDO_OP, 1,
+ [Define if your assembler supports .register.])
+ fi
fi
AC_SUBST(TARGET)
/* Define if you have the ANSI C header files. */
#undef STDC_HEADERS
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
/* Define this if you want extra debugging */
#undef FFI_DEBUG
/* Define this is you do not want support for the raw API. */
#undef FFI_NO_RAW_API
-/* The number of bytes in a double. */
-#undef SIZEOF_DOUBLE
+/* Define if you have the memcpy function. */
+#undef HAVE_MEMCPY
-/* The number of bytes in a float. */
-#undef SIZEOF_FLOAT
+/* The number of bytes in type short */
+#undef SIZEOF_SHORT
-/* The number of bytes in a int. */
+/* The number of bytes in type int */
#undef SIZEOF_INT
-/* The number of bytes in a long. */
+/* The number of bytes in type long */
#undef SIZEOF_LONG
-/* The number of bytes in a long double. */
-#undef SIZEOF_LONG_DOUBLE
-
-/* The number of bytes in a long long. */
+/* The number of bytes in type long long */
#undef SIZEOF_LONG_LONG
-/* The number of bytes in a short. */
-#undef SIZEOF_SHORT
+/* The number of bytes in type float */
+#undef SIZEOF_FLOAT
-/* The number of bytes in a void *. */
+/* The number of bytes in type double */
+#undef SIZEOF_DOUBLE
+
+/* The number of bytes in type long double */
+#undef SIZEOF_LONG_DOUBLE
+
+/* The number of bytes in type void * */
#undef SIZEOF_VOID_P
-/* Define if you have the memcpy function. */
-#undef HAVE_MEMCPY
+/* whether byteorder is bigendian */
+#undef WORDS_BIGENDIAN
+
+/* 1234 = LIL_ENDIAN, 4321 = BIGENDIAN */
+#undef BYTEORDER
-/* Define if your assembler and linker support unaligned PC relative relocs. */
+/* Define if your assembler and linker support unaligned PC relative relocs. */
#undef HAVE_AS_SPARC_UA_PCREL
+
+/* Define if your assembler supports .register. */
+#undef HAVE_AS_REGISTER_PSEUDO_OP
+
.globl ffi_closure_v8
ffi_closure_v8:
- .register %g2, #scratch
+#ifdef HAVE_AS_REGISTER_PSEUDO_OP
+ .register %g2, #scratch
+#endif
.LLFB2:
save %sp, -STACKFRAME, %sp
.LLCFI1: