clobberRegisterUses(RegVars, I, HistMap, LiveEntries, ClobberingInstr);
}
-// Returns the first instruction in @MBB which corresponds to
-// the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
-static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
- auto LastMI = MBB.getLastNonDebugInstr();
- if (LastMI == MBB.end() || !LastMI->isReturn())
- return nullptr;
- // Assume that epilogue starts with instruction having the same debug location
- // as the return instruction.
- DebugLoc LastLoc = LastMI->getDebugLoc();
- auto Res = LastMI;
- for (MachineBasicBlock::const_reverse_iterator I = LastMI.getReverse(),
- E = MBB.rend();
- I != E; ++I) {
- if (I->getDebugLoc() != LastLoc)
- return &*Res;
- Res = &*I;
- }
- // If all instructions have the same debug location, assume whole MBB is
- // an epilogue.
- return &*MBB.begin();
-}
-
-// Collect registers that are modified in the function body (their
-// contents is changed outside of the prologue and epilogue).
-static void collectChangingRegs(const MachineFunction *MF,
- const TargetRegisterInfo *TRI,
- BitVector &Regs) {
- for (const auto &MBB : *MF) {
- auto FirstEpilogueInst = getFirstEpilogueInst(MBB);
-
- for (const auto &MI : MBB) {
- // Avoid looking at prologue or epilogue instructions.
- if (&MI == FirstEpilogueInst)
- break;
- if (MI.getFlag(MachineInstr::FrameSetup))
- continue;
-
- // Look for register defs and register masks. Register masks are
- // typically on calls and they clobber everything not in the mask.
- for (const MachineOperand &MO : MI.operands()) {
- // Skip virtual registers since they are handled by the parent.
- if (MO.isReg() && MO.isDef() && MO.getReg() &&
- !TRI->isVirtualRegister(MO.getReg())) {
- for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
- ++AI)
- Regs.set(*AI);
- } else if (MO.isRegMask()) {
- Regs.setBitsNotInMask(MO.getRegMask());
- }
- }
- }
- }
-}
-
void llvm::calculateDbgEntityHistory(const MachineFunction *MF,
const TargetRegisterInfo *TRI,
DbgValueHistoryMap &DbgValues,
DbgLabelInstrMap &DbgLabels) {
- BitVector ChangingRegs(TRI->getNumRegs());
- collectChangingRegs(MF, TRI, ChangingRegs);
-
const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
unsigned FrameReg = TRI->getFrameRegister(*MF);
DbgValueEntriesMap LiveEntries;
for (const auto &MBB : *MF) {
for (const auto &MI : MBB) {
- if (!MI.isDebugInstr()) {
- // Not a DBG_VALUE instruction. It may clobber registers which describe
- // some variables.
- for (const MachineOperand &MO : MI.operands()) {
- if (MO.isReg() && MO.isDef() && MO.getReg()) {
- // Ignore call instructions that claim to clobber SP. The AArch64
- // backend does this for aggregate function arguments.
- if (MI.isCall() && MO.getReg() == SP)
- continue;
- // If this is a virtual register, only clobber it since it doesn't
- // have aliases.
- if (TRI->isVirtualRegister(MO.getReg()))
- clobberRegisterUses(RegVars, MO.getReg(), DbgValues, LiveEntries,
- MI);
- // If this is a register def operand, it may end a debug value
- // range.
- else {
- for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
- ++AI)
- if (ChangingRegs.test(*AI))
- clobberRegisterUses(RegVars, *AI, DbgValues, LiveEntries, MI);
- }
- } else if (MO.isRegMask()) {
- // If this is a register mask operand, clobber all debug values in
- // non-CSRs.
- for (unsigned I : ChangingRegs.set_bits()) {
- // Don't consider SP to be clobbered by register masks.
- if (unsigned(I) != SP && TRI->isPhysicalRegister(I) &&
- MO.clobbersPhysReg(I)) {
- clobberRegisterUses(RegVars, I, DbgValues, LiveEntries, MI);
- }
- }
- }
- }
- continue;
- }
-
if (MI.isDebugValue()) {
assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
// Use the base variable (without any DW_OP_piece expressions)
InlinedEntity L(RawLabel, MI.getDebugLoc()->getInlinedAt());
DbgLabels.addInstr(L, MI);
}
- }
- // Make sure locations for register-described variables are valid only
- // until the end of the basic block (unless it's the last basic block, in
- // which case let their liveness run off to the end of the function).
+ if (MI.isDebugInstr())
+ continue;
+
+ // Not a DBG_VALUE instruction. It may clobber registers which describe
+ // some variables.
+ for (const MachineOperand &MO : MI.operands()) {
+ if (MO.isReg() && MO.isDef() && MO.getReg()) {
+ // Ignore call instructions that claim to clobber SP. The AArch64
+ // backend does this for aggregate function arguments.
+ if (MI.isCall() && MO.getReg() == SP)
+ continue;
+ // If this is a virtual register, only clobber it since it doesn't
+ // have aliases.
+ if (TRI->isVirtualRegister(MO.getReg()))
+ clobberRegisterUses(RegVars, MO.getReg(), DbgValues, LiveEntries,
+ MI);
+ // If this is a register def operand, it may end a debug value
+ // range. Ignore defs of the frame register in the prologue.
+ else if (MO.getReg() != FrameReg ||
+ !MI.getFlag(MachineInstr::FrameSetup)) {
+ for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
+ ++AI)
+ clobberRegisterUses(RegVars, *AI, DbgValues, LiveEntries, MI);
+ }
+ } else if (MO.isRegMask()) {
+ // If this is a register mask operand, clobber all debug values in
+ // non-CSRs.
+ SmallVector<unsigned, 32> RegsToClobber;
+ // Don't consider SP to be clobbered by register masks.
+ for (auto It : RegVars) {
+ unsigned int Reg = It.first;
+ if (Reg != SP && TRI->isPhysicalRegister(Reg) &&
+ MO.clobbersPhysReg(Reg))
+ RegsToClobber.push_back(Reg);
+ }
+
+ for (unsigned Reg : RegsToClobber) {
+ clobberRegisterUses(RegVars, Reg, DbgValues, LiveEntries, MI);
+ }
+ }
+ } // End MO loop.
+ } // End instr loop.
+
+ // Make sure locations for all variables are valid only until the end of
+ // the basic block (unless it's the last basic block, in which case let
+ // their liveness run off to the end of the function).
if (!MBB.empty() && &MBB != &MF->back()) {
- for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
- auto CurElem = I++; // CurElem can be erased below.
- if (TRI->isVirtualRegister(CurElem->first) ||
- ChangingRegs.test(CurElem->first) ||
- CurElem->first == FrameReg)
- clobberRegisterUses(RegVars, CurElem, DbgValues, LiveEntries,
- MBB.back());
+ // Iterate over all variables that have open debug values.
+ for (auto &Pair : LiveEntries) {
+ if (Pair.second.empty())
+ continue;
+
+ // Create a clobbering entry.
+ EntryIndex ClobIdx = DbgValues.startClobber(Pair.first, MBB.back());
+
+ // End all entries.
+ for (EntryIndex Idx : Pair.second) {
+ DbgValueHistoryMap::Entry &Ent = DbgValues.getEntry(Pair.first, Idx);
+ assert(Ent.isDbgValue() && !Ent.isClosed());
+ Ent.endEntry(ClobIdx);
+ }
}
+
+ LiveEntries.clear();
+ RegVars.clear();
}
}
}
enum VarLocKind {
InvalidKind = 0,
RegisterKind,
- SpillLocKind
+ SpillLocKind,
+ ImmediateKind
} Kind = InvalidKind;
/// The value location. Stored separately to avoid repeatedly
uint64_t RegNo;
SpillLoc SpillLocation;
uint64_t Hash;
+ int64_t Immediate;
+ const ConstantFP *FPImm;
+ const ConstantInt *CImm;
} Loc;
VarLoc(const MachineInstr &MI, LexicalScopes &LS)
if (int RegNo = isDbgValueDescribedByReg(MI)) {
Kind = RegisterKind;
Loc.RegNo = RegNo;
+ } else if (MI.getOperand(0).isImm()) {
+ Kind = ImmediateKind;
+ Loc.Immediate = MI.getOperand(0).getImm();
+ } else if (MI.getOperand(0).isFPImm()) {
+ Kind = ImmediateKind;
+ Loc.FPImm = MI.getOperand(0).getFPImm();
+ } else if (MI.getOperand(0).isCImm()) {
+ Kind = ImmediateKind;
+ Loc.CImm = MI.getOperand(0).getCImm();
}
}
Loc.SpillLocation = {SpillBase, SpillOffset};
}
+ // Is the Loc field a constant or constant object?
+ bool isConstant() const { return Kind == ImmediateKind; }
+
/// If this variable is described by a register, return it,
/// otherwise return 0.
unsigned isDescribedByReg() const {
#endif
bool operator==(const VarLoc &Other) const {
- return Var == Other.Var && Loc.Hash == Other.Loc.Hash;
+ return Kind == Other.Kind && Var == Other.Var &&
+ Loc.Hash == Other.Loc.Hash;
}
/// This operator guarantees that VarLocs are sorted by Variable first.
OpenRanges.erase(V);
// Add the VarLoc to OpenRanges from this DBG_VALUE.
- // TODO: Currently handles DBG_VALUE which has only reg as location.
- if (isDbgValueDescribedByReg(MI)) {
+ unsigned ID;
+ if (isDbgValueDescribedByReg(MI) || MI.getOperand(0).isImm() ||
+ MI.getOperand(0).isFPImm() || MI.getOperand(0).isCImm()) {
+ // Use normal VarLoc constructor for registers and immediates.
VarLoc VL(MI, LS);
- unsigned ID = VarLocIDs.insert(VL);
+ ID = VarLocIDs.insert(VL);
+ OpenRanges.insert(ID, VL.Var);
+ } else if (MI.hasOneMemOperand()) {
+ // It's a stack spill -- fetch spill base and offset.
+ VarLoc::SpillLoc SpillLocation = extractSpillBaseRegAndOffset(MI);
+ VarLoc VL(MI, SpillLocation.SpillBase, SpillLocation.SpillOffset, LS);
+ ID = VarLocIDs.insert(VL);
OpenRanges.insert(ID, VL.Var);
+ } else {
+ // This must be an undefined location. We should leave OpenRanges closed.
+ assert(MI.getOperand(0).isReg() && MI.getOperand(0).getReg() == 0 &&
+ "Unexpected non-undef DBG_VALUE encountered");
}
}
// a new DBG_VALUE. process() will end this range however appropriate.
const VarLoc &DiffIt = VarLocIDs[ID];
const MachineInstr *DebugInstr = &DiffIt.MI;
- MachineInstr *MI = BuildMI(
- MBB, MBB.instr_begin(), DebugInstr->getDebugLoc(),
- DebugInstr->getDesc(), DebugInstr->isIndirectDebugValue(),
- DebugInstr->getOperand(0).getReg(), DebugInstr->getDebugVariable(),
- DebugInstr->getDebugExpression());
- if (DebugInstr->isIndirectDebugValue())
- MI->getOperand(1).setImm(DebugInstr->getOperand(1).getImm());
+ MachineInstr *MI = nullptr;
+ if (DiffIt.isConstant()) {
+ MachineOperand MO(DebugInstr->getOperand(0));
+ MI = BuildMI(MBB, MBB.instr_begin(), DebugInstr->getDebugLoc(),
+ DebugInstr->getDesc(), false, MO,
+ DebugInstr->getDebugVariable(),
+ DebugInstr->getDebugExpression());
+ } else {
+ MI = BuildMI(MBB, MBB.instr_begin(), DebugInstr->getDebugLoc(),
+ DebugInstr->getDesc(), DebugInstr->isIndirectDebugValue(),
+ DebugInstr->getOperand(0).getReg(),
+ DebugInstr->getDebugVariable(),
+ DebugInstr->getDebugExpression());
+ if (DebugInstr->isIndirectDebugValue())
+ MI->getOperand(1).setImm(DebugInstr->getOperand(1).getImm());
+ }
LLVM_DEBUG(dbgs() << "Inserted: "; MI->dump(););
ILS.set(ID);
++NumInserted;
; CHECK-NEXT: DW_AT_location (DW_OP_reg1 W1)
; CHECK-NEXT: DW_AT_abstract_origin {{.*}}"resource"
;
+; XFAIL: *
+; This test now fails as it requires the single-location variable recognizer
+; to spot that the inlined function goes out of scope before the 'find.exit'
+; exit block. Previously, unchanging variable locations could be extended to
+; the end of the function, often erronously, and that's why this test used to
+; pass.
+; A future algorithm _should_ be able to recognize that "resource"/!37 covers
+; all blocks in its lexical scope.
+;
; Generated from:
; typedef struct t *t_t;
; extern unsigned int enable;
; A by-value struct is a register-indirect value (breg).
-; RUN: llc %s -filetype=asm -o - | FileCheck %s
+; RUN: llc %s -filetype=obj -o - | llvm-dwarfdump - | FileCheck %s
+; REQUIRES: object-emission
-; CHECK: Lsection_info:
-; CHECK: DW_AT_location
-; CHECK-NEXT: .byte 112
-; 112 = 0x70 = DW_OP_breg0
+; Test that the 'f' parameter is present, with a location, and that the
+; expression for the location contains a DW_OP_breg
+; CHECK: DW_TAG_formal_parameter
+; CHECK-NEXT: DW_AT_location
+; CHECK-NEXT: DW_OP_breg
; rdar://problem/13658587
;
; ASM: popl %ebx
; ASM: [[EPILOGUE]]: # %return
; ASM: retl $8
-; ASM: Ltmp11:
+; ASM: Ltmp10:
; ASM: .cv_fpo_endproc
; Note how RvaStart advances 7 bytes to skip the shrink-wrapped portion.
; ASM: # %bb.2: # %for.body.preheader
; ASM: xorl %edi, %edi
; ASM: xorl %esi, %esi
+; ASM: [[oy_ox_start:\.Ltmp[0-9]+]]:
; ASM: .p2align 4, 0x90
; ASM: .LBB0_3: # %for.body
-; ASM: [[oy_ox_start:\.Ltmp[0-9]+]]:
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] 0
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] $edi
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
; ASM: .cv_loc 0 1 13 11 # t.c:13:11
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
; ASM: cmpl n(%rip), %eax
; ASM: jl .LBB0_3
+; ASM: [[loopskip_start:\.Ltmp[0-9]+]]:
+; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] 0
+; ASM: xorl %esi, %esi
+; ASM: xorl %edi, %edi
; ASM: [[oy_end:\.Ltmp[0-9]+]]:
; ASM: addl %edi, %esi
; ASM: movl %esi, %eax
+; XXX FIXME: the debug value line after loopskip_start should be repeated
+; because both fields of 'o' are zero flowing into this block. However, it
+; appears livedebugvalues doesn't account for fragments.
; ASM-LABEL: pad_right: # @pad_right
; ASM: movq %rcx, %rax
+; ASM: [[pad_right_tmp:\.Ltmp[0-9]+]]:
; ASM: #DEBUG_VALUE: pad_right:o <- [DW_OP_LLVM_fragment 32 32] $eax
; ASM: retq
; ASM-LABEL: pad_left: # @pad_left
; ASM: .cv_loc 2 1 24 3 # t.c:24:3
; ASM: movq %rcx, %rax
+; ASM: [[pad_left_tmp:\.Ltmp[0-9]+]]:
; ASM: #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] $eax
; ASM: retq
; ASM: .asciz "o"
; ASM: .cv_def_range [[oy_ox_start]] [[ox_start]], "C\021\030\000\000\000\000\000\000\000"
; ASM: .cv_def_range [[oy_ox_start]] [[oy_start]], "C\021\027\000\000\000\004\000\000\000"
-; ASM: .cv_def_range [[ox_start]] [[oy_end]], "C\021\030\000\000\000\000\000\000\000"
-; ASM: .cv_def_range [[oy_start]] [[oy_end]], "C\021\027\000\000\000\004\000\000\000"
+; ASM: .cv_def_range [[ox_start]] [[loopskip_start]], "C\021\030\000\000\000\000\000\000\000"
+; ASM: .cv_def_range [[oy_start]] [[loopskip_start]], "C\021\027\000\000\000\004\000\000\000"
; OBJ-LABEL: GlobalProcIdSym {
; ASM: .asciz "pad_right" # Function name
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "o"
-; ASM: .cv_def_range .Ltmp8 .Ltmp8, "C\021\021\000\000\000\004\000\000\000"
+; ASM: .cv_def_range [[pad_right_tmp]] [[pad_right_tmp]], "C\021\021\000\000\000\004\000\000\000"
; OBJ-LABEL: GlobalProcIdSym {
; OBJ: Kind: S_GPROC32_ID (0x1147)
; ASM: .asciz "pad_left" # Function name
; ASM: .short 4414 # Record kind: S_LOCAL
; ASM: .asciz "o"
-; ASM: .cv_def_range .Ltmp10 .Ltmp10, "C\021\021\000\000\000\000\000\000\000"
+; ASM: .cv_def_range [[pad_left_tmp]] [[pad_left_tmp]], "C\021\021\000\000\000\000\000\000\000"
; OBJ-LABEL: GlobalProcIdSym {
; OBJ: Kind: S_GPROC32_ID (0x1147)
# encountering an IMPLICIT_DEF in its own lexical scope.
# CHECK: .debug_info contents:
-# CHECK: DW_TAG_formal_parameter
-# CHECK: DW_AT_const_value [DW_FORM_udata] (0)
+# CHECK: DW_TAG_formal_parameter
+# CHECK: DW_AT_location [DW_FORM_sec_offset]
+# CHECK-NEXT: DW_OP_lit0, DW_OP_stack_value
+# CHECK-NEXT: DW_AT_abstract_origin {{.*}} "name"
--- |
; ModuleID = 't.ll'
source_filename = "t.ll"
!15 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "v", file: !5, line: 97, size: 64, elements: !2, identifier: "_ZTS1v")
!16 = !DISubroutineType(types: !2)
!17 = !DISubprogram(name: "bv", linkageName: "_ZN1v2bvEv", scope: !15, file: !5, line: 98, type: !16, isLocal: false, isDefinition: false, scopeLine: 98, flags: DIFlagPrototyped, isOptimized: true)
- !18 = !DILocalVariable(arg: 2, scope: !19, file: !5, line: 22, type: !21)
+ !18 = !DILocalVariable(name: "name", arg: 2, scope: !19, file: !5, line: 22, type: !21)
!19 = distinct !DISubprogram(name: "m", linkageName: "_ZN1jILi6EN1a1fEE1mEj", scope: !11, file: !5, line: 22, type: !16, isLocal: false, isDefinition: true, scopeLine: 22, flags: DIFlagPrototyped, isOptimized: true, unit: !0, declaration: !20, retainedNodes: !2)
!20 = !DISubprogram(name: "m", linkageName: "_ZN1jILi6EN1a1fEE1mEj", scope: !11, file: !5, line: 22, type: !16, isLocal: false, isDefinition: false, scopeLine: 22, flags: DIFlagPublic | DIFlagPrototyped, isOptimized: true)
!21 = !DIDerivedType(tag: DW_TAG_typedef, name: "h", file: !5, line: 10, baseType: !22)
# RUN: llc -o - %s -start-after=patchable-function -filetype=obj -O0 -mtriple=i386-unknown-linux-gnu -dwarf-version=4 | llvm-dwarfdump -v - | FileCheck %s
+# XFAIL: *
+# Marked XFail due to the removal of "ChangingRegs" from
+# DbgEntityHistoryCalculator, shortening the checked range to not reach the
+# end of the function. Fixed by an about-to-land patch using the FrameDestroy
+# flag to identify the end of functions.
+
# From the code:
#
# debug-loc-offset1.cc
; CHECK-NEXT: DW_AT_GNU_addr_base [DW_FORM_sec_offset] (0x00000000)
; CHECK: .debug_info.dwo contents:
+; CHECK: DW_TAG_formal_parameter
+; CHECK-NEXT: DW_AT_const_value [DW_FORM_sdata] (1)
+; CHECK-NEXT: DW_AT_name {{.*}} "p")
; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[A:0x[0-9a-z]*]]
; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[E:0x[0-9a-z]*]]
; CHECK: DW_AT_location [DW_FORM_sec_offset] ([[B:0x[0-9a-z]*]]
; CHECK-NEXT: Addr idx 3 (w/ length 15): DW_OP_reg0 RAX
; CHECK-NEXT: Addr idx 4 (w/ length 18): DW_OP_breg7 RSP-8
; CHECK: [[E]]:
-; CHECK-NEXT: Addr idx 5 (w/ length 23): DW_OP_reg0 RAX
+; CHECK-NEXT: Addr idx 5 (w/ length 9): DW_OP_reg0 RAX
+; CHECK-NEXT: Addr idx 6 (w/ length 98): DW_OP_breg7 RSP-44
; CHECK: [[B]]:
-; CHECK-NEXT: Addr idx 6 (w/ length 15): DW_OP_reg0 RAX
-; CHECK-NEXT: Addr idx 7 (w/ length 66): DW_OP_breg7 RSP-32
+; CHECK-NEXT: Addr idx 7 (w/ length 15): DW_OP_reg0 RAX
+; CHECK-NEXT: Addr idx 8 (w/ length 66): DW_OP_breg7 RSP-32
; CHECK: [[D]]:
-; CHECK-NEXT: Addr idx 8 (w/ length 15): DW_OP_reg0 RAX
-; CHECK-NEXT: Addr idx 9 (w/ length 42): DW_OP_breg7 RSP-20
+; CHECK-NEXT: Addr idx 9 (w/ length 15): DW_OP_reg0 RAX
+; CHECK-NEXT: Addr idx 10 (w/ length 42): DW_OP_breg7 RSP-20
; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo)
; HDR-NOT: .rela.{{.*}}.dwo
; Make sure we have enough stuff in the debug_addr to cover the address indexes
-; (9 is the last index in debug_loc.dwo, making 10 entries of 8 bytes each,
-; 10 * 8 == 80 base 10 == 50 base 16)
+; (10 is the last index in debug_loc.dwo, making 11 entries of 8 bytes each,
+; 11 * 8 == 88 base 10 == 58 base 16)
-; HDR: .debug_addr 00000050
+; HDR: .debug_addr 00000058
; HDR-NOT: .rela.{{.*}}.dwo
; Check for the existence of a DWARF v5-style range list table in the .debug_rnglists
# RUN: llc -o - %s -start-after=patchable-function -O0 | FileCheck %s
+# XFAIL: *
+# Marked XFail due to the removal of "ChangingRegs" from
+# DbgEntityHistoryCalculator, shortening the checked range to not reach the
+# end of the function. Fixed by an about-to-land patch using the FrameDestroy
+# flag to identify the end of functions.
+
# Generated from the source file pr19307.cc:
# #include <string>
# void parse_range(unsigned long long &offset, unsigned long long &limit,
; CHECK: DW_AT_name {{.*}} "this"
; CHECK-NOT: DW_TAG_subprogram
; CHECK: DW_TAG_formal_parameter
-; CHECK-NEXT: DW_AT_location {{.*}}(DW_OP_breg4 RSI+0)
+; CHECK-NEXT: DW_AT_location
+; CHECK-NEXT: DW_OP_breg4 RSI+0
; CHECK-NEXT: DW_AT_name {{.*}} "v"
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
; CHECK: DW_AT_name {{.*}} "f"
; CHECK: DW_TAG_variable
; CHECK-NEXT: DW_AT_location {{.*}} ([[F:.*]]
-; CHECK-NEXT: [{{.*}}, {{.*}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4)
+; CHECK-NEXT: [{{.*}}, {{.*}}): DW_OP_reg17 XMM0, DW_OP_piece 0x4, DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4
+; CHECK-NEXT: [{{.*}}, {{.*}}): DW_OP_piece 0x4, DW_OP_lit0, DW_OP_stack_value, DW_OP_piece 0x4)
; CHECK-NEXT: DW_AT_name {{.*}} "r"
;
; CHECK: .debug_loc contents:
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