With -msoft-float we ICE on __bf16 comparisons, because the
insns we want to use under the hood (cbranchsf4 and cstoresf4)
after performing the fast extensions aren't available.
The following patch copies the conditions from the c*sf4 expanders
to the corresponding c*bf4 expanders.
2022-12-06 Jakub Jelinek <jakub@redhat.com>
PR target/107969
* config/i386/i386.md (cbranchbf4, cstorebf4): Guard expanders
with the same condition as cbranchsf4 or cstoresf4 expanders.
* gcc.target/i386/pr107969.c: New test.
(const_int 0)])
(label_ref (match_operand 3))
(pc)))]
- ""
+ "TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)"
{
rtx op1 = ix86_expand_fast_convert_bf_to_sf (operands[1]);
rtx op2 = ix86_expand_fast_convert_bf_to_sf (operands[2]);
(match_operator 1 "comparison_operator"
[(reg:CC FLAGS_REG)
(const_int 0)]))]
- ""
+ "TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)"
{
rtx op1 = ix86_expand_fast_convert_bf_to_sf (operands[2]);
rtx op2 = ix86_expand_fast_convert_bf_to_sf (operands[3]);
--- /dev/null
+/* PR target/107969 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fexcess-precision=16 -msoft-float -msse2" } */
+
+int i;
+__bf16 f;
+
+void
+bar (void)
+{
+ i *= 0 <= f;
+}