remoteproc: qcom: q6v5: Fix missing clk_disable_unprepare() in q6v5_wcss_qcs404_power...

[ Upstream commit 7ff5d60f18bba5cbaf17b2926aa9da44d5beca01 ]

q6v5_wcss_qcs404_power_on() have no fail path for readl_poll_timeout().
Add fail path for readl_poll_timeout().

Fixes: 0af65b9b915e ("remoteproc: qcom: wcss: Add non pas wcss Q6 support for QCS404")
Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221204082757.18850-1-shangxiaojing@huawei.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c
index de232337e082cee6c93d109d06b8f8eeefa10d81..ba24d745b2d65c692f4a611b5e65d72423831481 100644 (file)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -351,7 +351,7 @@ static int q6v5_wcss_qcs404_power_on(struct q6v5_wcss *wcss)
        if (ret) {
                dev_err(wcss->dev,
                        "xo cbcr enabling timed out (rc:%d)\n", ret);
-               return ret;
+               goto disable_xo_cbcr_clk;
        }
 
        writel(0, wcss->reg_base + Q6SS_CGC_OVERRIDE);
@@ -417,6 +417,7 @@ disable_sleep_cbcr_clk:
        val = readl(wcss->reg_base + Q6SS_SLEEP_CBCR);
        val &= ~Q6SS_CLK_ENABLE;
        writel(val, wcss->reg_base + Q6SS_SLEEP_CBCR);
+disable_xo_cbcr_clk:
        val = readl(wcss->reg_base + Q6SS_XO_CBCR);
        val &= ~Q6SS_CLK_ENABLE;
        writel(val, wcss->reg_base + Q6SS_XO_CBCR);