uint32_t dsp_status;
uint32_t dsp_cntr;
uint32_t pipe_conf;
+ uint32_t palette[256];
} pipe_regs[PSB_PIPE_NUM];
uint32_t saveFPA0;
uint32_t saveDSPBCURSOR_BASE;
uint32_t saveDSPACURSOR_POS;
uint32_t saveDSPBCURSOR_POS;
- uint32_t save_palette_a[256];
- uint32_t save_palette_b[256];
uint32_t saveOV_OVADD;
uint32_t saveOV_OGAMC0;
uint32_t saveOV_OGAMC1;
uint32_t saveDSPCCURSOR_CTRL;
uint32_t saveDSPCCURSOR_BASE;
uint32_t saveDSPCCURSOR_POS;
- uint32_t save_palette_c[256];
uint32_t saveOV_OVADD_C;
uint32_t saveOV_OGAMC0_C;
uint32_t saveOV_OGAMC1_C;
mutex_destroy(&g_ospm_mutex);
}
+static inline unsigned long palette_reg(int pipe, int idx)
+{
+ return PSB_PALETTE(pipe) + (idx << 2);
+}
/*
* mdfld_save_display_registers
u32 dpll_reg = MRST_DPLL_A;
u32 fp_reg = MRST_FPA0;
u32 mipi_reg = MIPI;
- u32 palette_reg = PALETTE_A;
/* pointer to values */
u32 *dpll_val = &dev_priv->saveDPLL_A;
u32 *fp_val = &dev_priv->saveFPA0;
u32 *mipi_val = &dev_priv->saveMIPI;
- u32 *palette_val = dev_priv->save_palette_a;
PSB_DEBUG_ENTRY("\n");
switch (pipe) {
/* regester */
dpll_reg = MDFLD_DPLL_B;
fp_reg = MDFLD_DPLL_DIV0;
- palette_reg = PALETTE_B;
/* values */
dpll_val = &dev_priv->saveDPLL_B;
fp_val = &dev_priv->saveFPB0;
- palette_val = dev_priv->save_palette_b;
break;
case 2:
/* regester */
mipi_reg = MIPI_C;
- palette_reg = PALETTE_C;
/* pointer to values */
mipi_val = &dev_priv->saveMIPI_C;
- palette_val = dev_priv->save_palette_c;
break;
default:
DRM_ERROR("%s, invalid pipe number. \n", __FUNCTION__);
pr->dsp_status = PSB_RVDC32(PSB_PIPESTAT(pipe));
/*save palette (gamma) */
- for (i = 0; i < 256; i++)
- palette_val[i] = PSB_RVDC32(palette_reg + (i << 2));
+ for (i = 0; i < ARRAY_SIZE(pr->palette); i++)
+ pr->palette[i] = PSB_RVDC32(palette_reg(pipe, i));
if (pipe == 1) {
dev_priv->savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL);
u32 dpll_reg = MRST_DPLL_A;
u32 fp_reg = MRST_FPA0;
u32 mipi_reg = MIPI;
- u32 palette_reg = PALETTE_A;
/* values */
u32 dpll_val = dev_priv->saveDPLL_A & ~DPLL_VCO_ENABLE;
u32 fp_val = dev_priv->saveFPA0;
u32 mipi_val = dev_priv->saveMIPI;
- u32 *palette_val = dev_priv->save_palette_a;
PSB_DEBUG_ENTRY("\n");
switch (pipe) {
/* regester */
dpll_reg = MDFLD_DPLL_B;
fp_reg = MDFLD_DPLL_DIV0;
- palette_reg = PALETTE_B;
/* values */
dpll_val = dev_priv->saveDPLL_B & ~DPLL_VCO_ENABLE;
fp_val = dev_priv->saveFPB0;
- palette_val = dev_priv->save_palette_b;
break;
case 2:
dsi_output = dev_priv->dbi_output2;
/* regester */
mipi_reg = MIPI_C;
- palette_reg = PALETTE_C;
/* values */
mipi_val = dev_priv->saveMIPI_C;
- palette_val = dev_priv->save_palette_c;
dsi_config = dev_priv->dsi_configs[1];
break;
if (pipe == 1) {
/* restore palette (gamma) */
/*DRM_UDELAY(50000); */
- for (i = 0; i < 256; i++)
- PSB_WVDC32(palette_val[i], palette_reg + (i << 2));
+ for (i = 0; i < ARRAY_SIZE(pr->palette); i++)
+ PSB_WVDC32(pr->palette[i], palette_reg(pipe, i));
PSB_WVDC32(dev_priv->savePFIT_CONTROL, PFIT_CONTROL);
PSB_WVDC32(dev_priv->savePFIT_PGM_RATIOS, PFIT_PGM_RATIOS);
/* restore palette (gamma) */
/*DRM_UDELAY(50000); */
- for (i = 0; i < 256; i++)
- PSB_WVDC32(palette_val[i], palette_reg + (i << 2));
+ for (i = 0; i < ARRAY_SIZE(pr->palette); i++)
+ PSB_WVDC32(pr->palette[i], palette_reg(pipe, i));
return 0;
}