staging: dwc2: add helper variable to simplify code
authorMatthijs Kooijman <matthijs@stdin.nl>
Mon, 29 Apr 2013 19:42:00 +0000 (19:42 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 16 May 2013 22:23:55 +0000 (15:23 -0700)
Now a register is masked only in once place, instead of twice. This
makes the two uses of this value shorter so they no longer need to be
linewrapped.

Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/dwc2/hcd_intr.c

index 0eebba6..e84f244 100644 (file)
@@ -243,6 +243,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
        u32 usbcfg;
        u32 prtspd;
        u32 hcfg;
+       u32 fslspclksel;
        u32 hfir;
 
        dev_vdbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);
@@ -274,6 +275,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
                }
 
                hcfg = readl(hsotg->regs + HCFG);
+               fslspclksel = hcfg & HCFG_FSLSPCLKSEL_MASK;
 
                if (prtspd == HPRT0_SPD_LOW_SPEED &&
                    params->host_ls_low_power_phy_clk ==
@@ -281,8 +283,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
                        /* 6 MHZ */
                        dev_vdbg(hsotg->dev,
                                 "FS_PHY programming HCFG to 6 MHz\n");
-                       if ((hcfg & HCFG_FSLSPCLKSEL_MASK) !=
-                           HCFG_FSLSPCLKSEL_6_MHZ) {
+                       if (fslspclksel != HCFG_FSLSPCLKSEL_6_MHZ) {
                                hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
                                hcfg |= HCFG_FSLSPCLKSEL_6_MHZ;
                                writel(hcfg, hsotg->regs + HCFG);
@@ -292,8 +293,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
                        /* 48 MHZ */
                        dev_vdbg(hsotg->dev,
                                 "FS_PHY programming HCFG to 48 MHz\n");
-                       if ((hcfg & HCFG_FSLSPCLKSEL_MASK) !=
-                           HCFG_FSLSPCLKSEL_48_MHZ) {
+                       if (fslspclksel != HCFG_FSLSPCLKSEL_48_MHZ) {
                                hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
                                hcfg |= HCFG_FSLSPCLKSEL_48_MHZ;
                                writel(hcfg, hsotg->regs + HCFG);