const SITargetLowering &TLI = *getTLI<SITargetLowering>();
const DataLayout &DL = F.getParent()->getDataLayout();
- Info->allocateModuleLDSGlobal(F);
+ Info->allocateModuleLDSGlobal(F.getParent());
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
const SIRegisterInfo *TRI = Subtarget.getRegisterInfo();
const DataLayout &DL = F.getParent()->getDataLayout();
- Info->allocateModuleLDSGlobal(F);
+ Info->allocateModuleLDSGlobal(F.getParent());
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext());
return Offset;
}
-void AMDGPUMachineFunction::allocateModuleLDSGlobal(const Function &F) {
- const Module *M = F.getParent();
+void AMDGPUMachineFunction::allocateModuleLDSGlobal(const Module *M) {
if (isModuleEntryFunction()) {
const GlobalVariable *GV = M->getNamedGlobal("llvm.amdgcn.module.lds");
if (GV) {
}
unsigned allocateLDSGlobal(const DataLayout &DL, const GlobalVariable &GV);
- void allocateModuleLDSGlobal(const Function &);
+ void allocateModuleLDSGlobal(const Module *M);
Align getDynLDSAlign() const { return DynLDSAlign; }
return DAG.getEntryNode();
}
- Info->allocateModuleLDSGlobal(Fn);
+ Info->allocateModuleLDSGlobal(Fn.getParent());
SmallVector<ISD::InputArg, 16> Splits;
SmallVector<CCValAssign, 16> ArgLocs;