Staging: et131x: kill off the TXDMA CSR type
authorAlan Cox <alan@linux.intel.com>
Thu, 27 Aug 2009 10:03:38 +0000 (11:03 +0100)
committerGreg Kroah-Hartman <gregkh@suse.de>
Tue, 15 Sep 2009 19:02:29 +0000 (12:02 -0700)
Go to a u32 and masks

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/staging/et131x/et1310_address_map.h
drivers/staging/et131x/et1310_tx.c

index 6c69a15..6294d38 100644 (file)
@@ -173,31 +173,15 @@ typedef struct _GLOBAL_t {                        /* Location: */
 /* START OF TXDMA REGISTER ADDRESS MAP */
 
 /*
- * structure for txdma control status reg in txdma address map
- * located at address 0x1000
+ * txdma control status reg at address 0x1000
  */
-typedef union _TXDMA_CSR_t {
-       u32 value;
-       struct {
-#ifdef _BIT_FIELDS_HTOL
-               u32 unused2:19;         /* bits 13-31 */
-               u32 traffic_class:4;    /* bits 9-12 */
-               u32 sngl_epkt_mode:1;   /* bit 8 */
-               u32 cache_thrshld:4;    /* bits 4-7 */
-               u32 unused1:2;          /* bits 2-3 */
-               u32 drop_TLP_disable:1; /* bit 1 */
-               u32 halt:1;             /* bit 0 */
-#else
-               u32 halt:1;             /* bit 0 */
-               u32 drop_TLP_disable:1; /* bit 1 */
-               u32 unused1:2;          /* bits 2-3 */
-               u32 cache_thrshld:4;    /* bits 4-7 */
-               u32 sngl_epkt_mode:1;   /* bit 8 */
-               u32 traffic_class:4;    /* bits 9-12 */
-               u32 unused2:19;         /* bits 13-31 */
-#endif
-       } bits;
-} TXDMA_CSR_t, *PTXDMA_CSR_t;
+
+#define ET_TXDMA_CSR_HALT      0x00000001
+#define ET_TXDMA_DROP_TLP      0x00000002
+#define ET_TXDMA_CACHE_THRS    0x000000F0
+#define ET_TXDMA_CACHE_SHIFT   4
+#define ET_TXDMA_SNGL_EPKT     0x00000100
+#define ET_TXDMA_CLASS         0x00001E00
 
 /*
  * structure for txdma packet ring base address hi reg in txdma address map
@@ -274,7 +258,7 @@ extern inline void add_10bit(u32 *v, int n)
  * Located at address 0x1000
  */
 typedef struct _TXDMA_t {              /* Location: */
-       TXDMA_CSR_t csr;                /*  0x1000 */
+       u32 csr;                        /*  0x1000 */
        u32 pr_base_hi;                 /*  0x1004 */
        u32 pr_base_lo;                 /*  0x1008 */
        TXDMA_PR_NUM_DES_t pr_num_des;  /*  0x100C */
index 387a697..94f7752 100644 (file)
@@ -267,7 +267,8 @@ void ConfigTxDmaRegs(struct et131x_adapter *etdev)
 void et131x_tx_dma_disable(struct et131x_adapter *etdev)
 {
        /* Setup the tramsmit dma configuration register */
-       writel(0x101, &etdev->regs->txdma.csr.value);
+       writel(ET_TXDMA_CSR_HALT|ET_TXDMA_SNGL_EPKT,
+                                       &etdev->regs->txdma.csr);
 }
 
 /**
@@ -278,20 +279,16 @@ void et131x_tx_dma_disable(struct et131x_adapter *etdev)
  */
 void et131x_tx_dma_enable(struct et131x_adapter *etdev)
 {
-       if (etdev->RegistryPhyLoopbk) {
+       u32 csr = ET_TXDMA_SNGL_EPKT;
+       if (etdev->RegistryPhyLoopbk)
                /* TxDMA is disabled for loopback operation. */
-               writel(0x101, &etdev->regs->txdma.csr.value);
-       } else {
-               TXDMA_CSR_t csr = { 0 };
-
+               csr |= ET_TXDMA_CSR_HALT;
+       else
                /* Setup the transmit dma configuration register for normal
                 * operation
                 */
-               csr.bits.sngl_epkt_mode = 1;
-               csr.bits.halt = 0;
-               csr.bits.cache_thrshld = PARM_DMA_CACHE_DEF;
-               writel(csr.value, &etdev->regs->txdma.csr.value);
-       }
+               csr |= PARM_DMA_CACHE_DEF << ET_TXDMA_CACHE_SHIFT;
+       writel(csr, &etdev->regs->txdma.csr);
 }
 
 /**