sh_eth: rename TRSCER bits

In all the SoC manuals the TRSCER register bits match the corresponding
EESR registers's bits, but only on the R-Car gen2 SoC those are named
RINT<n> and TINT<n>.  Follow the suit and rename the *enum* tag/entries
from DESC_I_* to TRSCER_*.

Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index f029c7c..8023f48 100644 (file)
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -560,7 +560,7 @@ static struct sh_eth_cpu_data r7s72100_data = {
                          EESR_TDE,
        .fdr_value      = 0x0000070f,
 
-       .trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5,
+       .trscer_err_mask = TRSCER_RMAFCE | TRSCER_RRFCE,
 
        .no_psr         = 1,
        .apr            = 1,
@@ -701,7 +701,7 @@ static struct sh_eth_cpu_data rcar_gen2_data = {
                          EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
        .fdr_value      = 0x00000f0f,
 
-       .trscer_err_mask = DESC_I_RINT8,
+       .trscer_err_mask = TRSCER_RMAFCE,
 
        .apr            = 1,
        .mpr            = 1,
@@ -782,7 +782,7 @@ static struct sh_eth_cpu_data r7s9210_data = {
 
        .fdr_value      = 0x0000070f,
 
-       .trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5,
+       .trscer_err_mask = TRSCER_RMAFCE | TRSCER_RRFCE,
 
        .apr            = 1,
        .mpr            = 1,
@@ -1094,7 +1094,7 @@ static struct sh_eth_cpu_data sh771x_data = {
                          EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
                          EESIPR_PREIP | EESIPR_CERFIP,
 
-       .trscer_err_mask = DESC_I_RINT8,
+       .trscer_err_mask = TRSCER_RMAFCE,
 
        .tsu            = 1,
        .dual_port      = 1,

diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index c1b3751..9a4bfdb 100644 (file)
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -380,14 +380,20 @@ enum MPR_BIT {
 };
 
 /* TRSCER */
-enum DESC_I_BIT {
-       DESC_I_TINT4 = 0x0800, DESC_I_TINT3 = 0x0400, DESC_I_TINT2 = 0x0200,
-       DESC_I_TINT1 = 0x0100, DESC_I_RINT8 = 0x0080, DESC_I_RINT5 = 0x0010,
-       DESC_I_RINT4 = 0x0008, DESC_I_RINT3 = 0x0004, DESC_I_RINT2 = 0x0002,
-       DESC_I_RINT1 = 0x0001,
-};
-
-#define DEFAULT_TRSCER_ERR_MASK (DESC_I_RINT8 | DESC_I_RINT5 | DESC_I_TINT2)
+enum TRSCER_BIT {
+       TRSCER_CNDCE    = 0x00000800,
+       TRSCER_DLCCE    = 0x00000400,
+       TRSCER_CDCE     = 0x00000200,
+       TRSCER_TROCE    = 0x00000100,
+       TRSCER_RMAFCE   = 0x00000080,
+       TRSCER_RRFCE    = 0x00000010,
+       TRSCER_RTLFCE   = 0x00000008,
+       TRSCER_RTSFCE   = 0x00000004,
+       TRSCER_PRECE    = 0x00000002,
+       TRSCER_CERFCE   = 0x00000001,
+};
+
+#define DEFAULT_TRSCER_ERR_MASK (TRSCER_RMAFCE | TRSCER_RRFCE | TRSCER_CDCE)
 
 /* RPADIR */
 enum RPADIR_BIT {