* tc-a29k.c: Fix formatting.
* tc-alpha.c: Likewise.
* tc-arm.c: Likewise.
* tc-cris.c: Likewise.
* tc-hppa.c: Likewise.
* tc-i370.c: Likewise.
* tc-i386.c: Likewise.
* tc-i860.c: Likewise.
* tc-i960.c: Likewise.
* tc-ia64.c: Likewise.
* tc-m68hc11.c: Likewise.
* tc-m68k.c: Likewise.
* tc-m88k.c: Likewise.
* tc-pj.c: Likewise.
* tc-ppc.c: Likewise.
* tc-sh.c: Likewise.
* tc-sparc.c: Likewise.
* tc-tahoe.c: Likewise.
* tc-vax.c: Likewise.
+2000-12-03 Kazu Hirata <kazu@hxi.com>
+
+ * config/tc-a29k.c: Fix formatting.
+ * config/tc-alpha.c: Likewise.
+ * config/tc-arm.c: Likewise.
+ * config/tc-cris.c: Likewise.
+ * config/tc-hppa.c: Likewise.
+ * config/tc-i370.c: Likewise.
+ * config/tc-i386.c: Likewise.
+ * config/tc-i860.c: Likewise.
+ * config/tc-i960.c: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-m68hc11.c: Likewise.
+ * config/tc-m68k.c: Likewise.
+ * config/tc-m88k.c: Likewise.
+ * config/tc-pj.c: Likewise.
+ * config/tc-ppc.c: Likewise.
+ * config/tc-sh.c: Likewise.
+ * config/tc-sparc.c: Likewise.
+ * config/tc-tahoe.c: Likewise.
+ * config/tc-vax.c: Likewise.
+
2000-12-01 Chris Demetriou <cgd@sibyte.com>
* config/tc-mips.c (mips_ip): When calculating offsets,
struct option md_longopts[] = {
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
#if 1
#define range_signed_16(x) \
- (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
+ (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
#define range_signed_32(x) \
- (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
+ (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
#else
-#define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
- (offsetT)(x) <= (offsetT)0x7FFF)
-#define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
- (offsetT)(x) <= (offsetT)0x7FFFFFFF)
+#define range_signed_16(x) ((offsetT) (x) >= -(offsetT)0x8000 && \
+ (offsetT) (x) <= (offsetT)0x7FFF)
+#define range_signed_32(x) ((offsetT) (x) >= -(offsetT)0x80000000 && \
+ (offsetT) (x) <= (offsetT)0x7FFFFFFF)
#endif
/* Macros for sign extending from 16- and 32-bits. */
but really a predicate should be found to use the non-cast forms. */
#if 1
-#define sign_extend_16(x) ((short)(x))
-#define sign_extend_32(x) ((int)(x))
+#define sign_extend_16(x) ((short) (x))
+#define sign_extend_32(x) ((int) (x))
#else
-#define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
-#define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
+#define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
+#define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
^ 0x80000000) - 0x80000000)
#endif
/* Macros to build tokens */
-#define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_reg(t, r) (memset(&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
(t).X_add_number = (r))
-#define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_preg(t, r) (memset(&(t), 0, sizeof (t)), \
(t).X_op = O_pregister, \
(t).X_add_number = (r))
-#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof (t)), \
(t).X_op = O_cpregister, \
(t).X_add_number = (r))
-#define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_freg(t, r) (memset(&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
(t).X_add_number = (r)+32)
-#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof (t)), \
(t).X_op = O_symbol, \
(t).X_add_symbol = (s), \
(t).X_add_number = (a))
-#define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_const(t, n) (memset(&(t), 0, sizeof (t)), \
(t).X_op = O_constant, \
(t).X_add_number = (n))
{ NULL, no_argument, NULL, 0 }
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
\f
#ifdef OBJ_EVAX
#define ALPHA_RELOC_TABLE(op) \
&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
? (abort (), 0) \
- : (int)(op) - (int)O_literal) ]
+ : (int) (op) - (int)O_literal) ]
#define LITUSE_BASE 1
#define LITUSE_BYTOFF 2
};
static const int alpha_num_reloc_op
- = sizeof(alpha_reloc_op) / sizeof(*alpha_reloc_op);
+ = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
/* Maximum # digits needed to hold the largest sequence # */
#define ALPHA_RELOC_DIGITS 25
/* Whether a sequence number is valid. */
-#define ALPHA_RELOC_SEQUENCE_OK(X) ((X) > 0 && ((unsigned)(X)) == (X))
+#define ALPHA_RELOC_SEQUENCE_OK(X) ((X) > 0 && ((unsigned) (X)) == (X))
/* Structure to hold explict sequence information. */
struct alpha_literal_tag
};
static const unsigned int alpha_num_macros
- = sizeof(alpha_macros) / sizeof(*alpha_macros);
+ = sizeof (alpha_macros) / sizeof (*alpha_macros);
\f
/* Public interface functions */
for (i = 0; i < 32; ++i)
{
char name[4];
- sprintf(name, "$%d", i);
+ sprintf (name, "$%d", i);
alpha_register_table[i] = symbol_create(name, reg_section, i,
&zero_address_frag);
}
for (; i < 64; ++i)
{
char name[5];
- sprintf(name, "$f%d", i-32);
+ sprintf (name, "$f%d", i-32);
alpha_register_table[i] = symbol_create(name, reg_section, i,
&zero_address_frag);
}
default:
/* everything else should have been fake */
- abort();
+ abort ();
}
++tokidx;
}
}
break;
default:
- abort();
+ abort ();
}
}
else
if (insn.nfixups > 0)
{
memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
+ sizeof (struct alpha_fixup) * insn.nfixups);
}
insn.nfixups++;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
if (insn.nfixups > 0)
{
memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
+ sizeof (struct alpha_fixup) * insn.nfixups);
}
insn.nfixups++;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
if (insn.nfixups > 0)
{
memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
+ sizeof (struct alpha_fixup) * insn.nfixups);
}
insn.nfixups++;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
}
#endif
- memcpy (newtok, tok, sizeof(newtok));
+ memcpy (newtok, tok, sizeof (newtok));
newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
assemble_tokens ("lda", newtok, ntok, 1);
int ntok;
const PTR vlgsize;
{
- int lgsize = (int)(long)vlgsize;
+ int lgsize = (int) (long)vlgsize;
if (alpha_target & AXP_OPCODE_BWX)
emit_loadstore (tok, ntok, stX_op[lgsize]);
int ntok;
const PTR vlgsize;
{
- int lgsize = (int)(long)vlgsize;
+ int lgsize = (int) (long)vlgsize;
expressionS newtok[3];
/* emit "lda $at, exp" */
if (insn.nfixups > 0)
{
memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
+ sizeof (struct alpha_fixup) * insn.nfixups);
}
insn.nfixups++;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
ecoff_directive_val,
};
- assert (which >= 0 && which < (int)(sizeof(fns)/sizeof(*fns)));
+ assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
if (ECOFF_DEBUGGING)
- (*fns[which])(0);
+ (*fns[which]) (0);
else
{
as_bad (_("ECOFF debugging is disabled."));
case O_symbol:
break;
default:
- abort();
+ abort ();
}
#else
#ifdef OBJ_ECOFF
accum0_required_here (str)
char ** str;
{
- static char buff [128]; /* Note the address is taken. Hence, static. */
+ static char buff [128]; /* Note the address is taken. Hence, static. */
char * p = * str;
char c;
int result = 0; /* The accum number. */
skip_whitespace (p);
-
+
*str = p; /* Advance caller's string pointer too. */
c = *p++;
while (isalnum (c))
c = *p++;
*--p = 0; /* Aap nul into input buffer at non-alnum. */
-
+
if (! ( streq (*str, "acc0") || streq (*str, "ACC0")))
{
sprintf (buff, _("acc0 expected, not '%.100s'"), *str);
inst.error = buff;
result = FAIL;
}
-
+
*p = c; /* Unzap. */
*str = p; /* Caller's string pointer to after match. */
return result;
/* Expects **str -> after a comma. May be leading blanks.
Advances *str, recognizing a load mode, and setting inst.instruction.
- Returns rn, or else FAIL (in which case may set inst.error
+ Returns rn, or else FAIL (in which case may set inst.error
and not advance str)
-
+
Note: doesn't know Rd, so no err checks that require such knowledge. */
static int
int pre_inc = 0;
skip_whitespace (str);
-
+
if (* str == '[')
{
str++;
-
+
skip_whitespace (str);
if ((rn = reg_required_here (& str, 16)) == FAIL)
if (* str == ']')
{
str ++;
-
+
if (skip_past_comma (& str) == SUCCESS)
{
/* [Rn],... (post inc) */
}
pre_inc = 1;
-
+
if (ldst_extend (& str, 1) == FAIL)
return FAIL;
inst.reloc.exp.X_add_number -= 8; /* PC rel adjust. */
inst.reloc.pc_rel = 1;
inst.instruction |= (REG_PC << 16);
-
+
rn = REG_PC;
pre_inc = 1;
}
inst.instruction |= (pre_inc ? PRE_INDEX : 0);
* string = str;
-
+
return rn;
}
|| (rn = reg_required_here (& str, 12)) == FAIL)
inst.error = BAD_ARGS;
- else if (rd == REG_PC || rm == REG_PC || rs == REG_PC || rn == REG_PC)
+ else if (rd == REG_PC || rm == REG_PC || rs == REG_PC || rn == REG_PC)
inst.error = BAD_PC;
else if (flags)
if (rdlo == rdhi)
as_tsktsk (_("rdhi and rdlo must be different"));
-
+
if (flags)
inst.error = BAD_FLAGS;
else
/* ARM V5E (el Segundo)
MCRRcc <coproc>, <opcode>, <Rd>, <Rn>, <CRm>.
- MRRCcc <coproc>, <opcode>, <Rd>, <Rn>, <CRm>.
+ MRRCcc <coproc>, <opcode>, <Rd>, <Rn>, <CRm>.
These are equivalent to the XScale instructions MAR and MRA,
- respectively, when coproc == 0, opcode == 0, and CRm == 0.
+ respectively, when coproc == 0, opcode == 0, and CRm == 0.
Result unpredicatable if Rd or Rn is R15. */
/* Unpredictable result if rd or rn is R15. */
if (rd == REG_PC || rn == REG_PC)
- as_tsktsk
+ as_tsktsk
(_("Warning: Instruction unpredictable when using r15"));
if (skip_past_comma (& str) == FAIL
end_of_line (str);
}
-
/* ARM V5 count-leading-zeroes instruction (argument parse)
CLZ{<cond>} <Rd>, <Rm>
Condition defaults to COND_ALWAYS.
if (flags)
inst.error = BAD_FLAGS;
-
+
end_of_line (str);
}
expressionS expr;
unsigned long number;
- skip_whitespace (str);
+ skip_whitespace (str);
/* Allow optional leading '#'. */
if (is_immediate_prefix (*str))
inst.error = _("bad or missing expression");
return;
}
-
+
number = expr.X_add_number;
-
+
/* Check it fits an 8 bit unsigned. */
if (number != (number & 0xff))
{
{
if (my_get_expression (& inst.reloc.exp, & str))
return;
-
+
#ifdef OBJ_ELF
{
char * save_in;
-
+
/* ScottB: February 5, 1998 */
/* Check to see of PLT32 reloc required for the instruction. */
-
+
/* arm_parse_reloc() works on input_line_pointer.
We actually want to parse the operands to the branch instruction
passed in 'str'. Save the input pointer and restore it later. */
save_in = input_line_pointer;
input_line_pointer = str;
-
+
if (inst.reloc.exp.X_op == O_symbol
&& *str == '('
&& arm_parse_reloc () == BFD_RELOC_ARM_PLT32)
inst.reloc.type = BFD_RELOC_ARM_PCREL_BLX;
inst.reloc.pc_rel = 1;
}
-
+
input_line_pointer = save_in;
}
#else
inst.reloc.type = BFD_RELOC_ARM_PCREL_BLX;
inst.reloc.pc_rel = 1;
#endif /* OBJ_ELF */
-
+
end_of_line (str);
}
BLX{<condition>} <Rm> ie BLX(2)
Unfortunately, there are two different opcodes for this mnemonic.
So, the insns[].value is not used, and the code here zaps values
- into inst.instruction.
+ into inst.instruction.
Also, the <target_addr> can be 25 bits, hence has its own reloc. */
static void
as_bad (BAD_FLAGS);
return;
}
-
+
skip_whitespace (mystr);
rm = reg_required_here (& mystr, 0);
-
+
/* The above may set inst.error. Ignore his opinion. */
inst.error = 0;
-
+
if (rm != FAIL)
{
/* Arg is a register.
inst.error = BAD_COND;
return;
}
-
+
inst.instruction = 0xfafffffe;
-
+
/* Process like a B/BL, but with a different reloc.
Note that B/BL expecte fffffe, not 0, offset in the opcode table. */
do_branch25 (str, flags);
inst.instruction = 0x4780;
/* Note that this call is to the ARM register recognizer. BLX(2)
- uses the ARM register space, not the Thumb one, so a call to
+ uses the ARM register space, not the Thumb one, so a call to
thumb_reg() would be wrong. */
rm = reg_required_here (& mystr, 3);
inst.error = 0;
-
+
if (rm != FAIL)
{
/* It's BLX(2). The .instruction was zapped with rm & is final. */
if (my_get_expression (& inst.reloc.exp, & mystr))
return;
-
+
inst.reloc.type = BFD_RELOC_THUMB_PCREL_BLX;
inst.reloc.pc_rel = 1;
}
-
+
end_of_line (mystr);
}
unsigned long number;
skip_whitespace (str);
-
+
/* Allow optional leading '#'. */
if (is_immediate_prefix (* str))
str++;
memset (& expr, '\0', sizeof (expr));
-
+
if (my_get_expression (& expr, & str) || (expr.X_op != O_constant))
{
inst.error = _("bad or missing expression");
return;
}
-
+
number = expr.X_add_number;
-
+
/* Check it fits a 16 bit unsigned. */
if (number != (number & 0xffff))
{
inst.error = _("immediate value out of range");
return;
}
-
+
/* Top 12 of 16 bits to bits 19:8. */
inst.instruction |= (number & 0xfff0) << 4;
-
+
/* Bottom 4 of 16 bits to bits 3:0. */
inst.instruction |= number & 0xf;
}
/* Xscale multiply-accumulate (argument parse)
- MIAcc acc0,Rm,Rs
+ MIAcc acc0,Rm,Rs
MIAPHcc acc0,Rm,Rs
MIAxycc acc0,Rm,Rs. */
if (flags)
as_bad (BAD_FLAGS);
-
+
else if (accum0_required_here (& str) == FAIL)
inst.error = ERR_NO_ACCUM;
-
+
else if (skip_past_comma (& str) == FAIL
|| (rm = reg_required_here (& str, 0)) == FAIL)
inst.error = BAD_ARGS;
-
+
else if (skip_past_comma (& str) == FAIL
|| (rs = reg_required_here (& str, 12)) == FAIL)
inst.error = BAD_ARGS;
-
- /* inst.instruction has now been zapped with both rm and rs. */
+
+ /* inst.instruction has now been zapped with both rm and rs. */
else if (rm == REG_PC || rs == REG_PC)
inst.error = BAD_PC; /* Undefined result if rm or rs is R15. */
-
+
else
end_of_line (str);
}
if (flags)
as_bad (BAD_FLAGS);
-
+
else if (accum0_required_here (& str) == FAIL)
inst.error = ERR_NO_ACCUM;
-
+
else if (skip_past_comma (& str) == FAIL
|| (rdlo = reg_required_here (& str, 12)) == FAIL)
inst.error = BAD_ARGS;
-
+
else if (skip_past_comma (& str) == FAIL
|| (rdhi = reg_required_here (& str, 16)) == FAIL)
inst.error = BAD_ARGS;
-
+
/* inst.instruction has now been zapped with both rdlo and rdhi. */
else if (rdlo == REG_PC || rdhi == REG_PC)
inst.error = BAD_PC; /* Undefined result if rdlo or rdhi is R15. */
-
+
else
end_of_line (str);
}
end_of_line (str);
}
-/* Xscale: Preload-Cache
+/* Xscale: Preload-Cache
PLD <addr_mode>
-
+
Syntactically, like LDR with B=1, W=0, L=1. */
static void
return;
skip_whitespace (str);
-
+
if (* str == ']')
{
/* [Rn], ... ? */
inst.error = _("pre-indexed expression expected");
return;
}
-
+
if (ldst_extend (& str, 0) == FAIL)
return;
++ str;
skip_whitespace (str);
-
+
if (* str == '!') /* [Rn]! */
{
inst.error = _("writeback used in preload instruction");
++ str;
}
-
+
inst.instruction |= PRE_INDEX;
}
return;
}
-
+
if ((cpu_variant & ARM_EXT_XSCALE) != ARM_EXT_XSCALE)
{
static char buff[128];
while (isspace (*str))
--str;
str -= 4;
-
+
/* Deny all knowledge. */
sprintf (buff, _("bad instruction '%.100s'"), str);
inst.error = buff;
return;
}
-
+
skip_whitespace (str);
-
+
if ((rd = reg_required_here (& str, 12)) == FAIL)
{
inst.error = BAD_ARGS;
inst.error = BAD_ARGS;
return;
}
-
+
/* inst.instruction has now been zapped with Rd and the addressing mode. */
if (rd & 1) /* Unpredictable result if Rd is odd. */
{
- inst.error = _("Destination register must be even");
+ inst.error = _("Destination register must be even");
return;
}
((inst.instruction & WRITE_BACK)
|| (!(inst.instruction & PRE_INDEX))))
as_warn (_("pre/post-indexing used when modified address register is destination"));
-
+
end_of_line (str);
}
if (atpcs)
{
asection * sec;
-
+
sec = bfd_make_section (stdoutput, ".arm.atpcs");
if (sec != NULL)
if (strncmp (input_line_pointer, sp->operand,
strlen (sp->operand)) == 0)
{
- (sp->fn)();
+ (sp->fn) ();
input_line_pointer += strlen (sp->operand);
demand_empty_rest_of_line ();
#endif
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
return 0;
}
-#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg))
+#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
/* Given NAME, find the register number associated with that name, return
the integer value associated with the given name or -1 on failure. */
md_show_usage (stream)
FILE *stream;
{
- fprintf(stream, "\
+ fprintf (stream, "\
S/370 options: (these have not yet been tested and may not work) \n\
-u ignored\n\
-mregnames Allow symbolic names for registers\n\
-mno-regnames Do not allow symbolic names for registers\n");
#ifdef OBJ_ELF
- fprintf(stream, "\
+ fprintf (stream, "\
-mrelocatable support for GCC's -mrelocatble option\n\
-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
-V print assembler version number\n");
};
-#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg))
+#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
/* Given NAME, find the register number associated with that name, return
the integer value associated with the given name or -1 on failure. */
{
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
int len;
struct map_bfd *ptr;
-#define MAP(str,reloc) { str, sizeof(str)-1, reloc }
+#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
static struct map_bfd mapping[] =
{
p = frag_more (nbytes);
while (end > input_line_pointer)
{
- *p = ascebc [(unsigned char)(*input_line_pointer)];
+ *p = ascebc [(unsigned char) (*input_line_pointer)];
++p; ++input_line_pointer;
}
*p = '\0';
size = bfd_get_reloc_size (reloc_howto);
if (size < 1 || size > 4)
- abort();
+ abort ();
printf (" gwana doo fixup %d \n", i);
fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
break;
default:
- fprintf(stderr,
+ fprintf (stderr,
"Gas failure, reloc value %d\n", fixp->fx_r_type);
fflush(stderr);
abort ();
#endif
#define ENCODE_RELAX_STATE(type,size) \
- ((relax_substateT)((type<<2) | (size)))
+ ((relax_substateT) ((type<<2) | (size)))
#define SIZE_FROM_RELAX_STATE(s) \
( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
save_str = (char *)malloc (strlen (cur_token.str) + 1);
if (save_str == NULL)
- abort();
+ abort ();
strcpy (save_str, cur_token.str);
/* Get the next token to check for register scaling. */
string. */
new_token.str = (char *)malloc (strlen (intel_parser.op_string) + 1);
if (new_token.str == NULL)
- abort();
+ abort ();
new_token.str[0] = '\0';
if (strchr ("0123456789", *intel_parser.op_string))
{
char *buf;
- long val = (long)(*valuep);
+ long val = (long) (*valuep);
unsigned long insn;
valueT fup;
}
#define MAX_LITTLENUMS 6
-#define LNUM_SIZE sizeof(LITTLENUM_TYPE)
+#define LNUM_SIZE sizeof (LITTLENUM_TYPE)
/*****************************************************************************
md_atof: convert ascii to floating point
&& strncmp (idesc->name, "probe", 5) != 0)
return 0;
}
- if (prev_group->g_reg_set_conditionally[regno])
+ if (prev_group->g_reg_set_conditionally[regno])
return 1;
}
}
regdepstotlen += 20;
regdeps = (struct rsrc *)
xrealloc ((void *) regdeps,
- regdepstotlen * sizeof(struct rsrc));
+ regdepstotlen * sizeof (struct rsrc));
}
regdeps[regdepslen] = *spec;
if (possible_mode != M6811_OP_NONE)
mode = possible_mode;
-
+
if ((current_architecture & cpu6811)
&& possible_mode != M6811_OP_NONE)
- as_bad (_("Pre-increment mode is not valid for 68HC11"));
+ as_bad (_("Pre-increment mode is not valid for 68HC11"));
/* Backtrack. */
if (which == 0 && opmode & M6812_OP_IDX_P2
&& reg != REG_X && reg != REG_Y
extern char *input_line_pointer;
static char mklower_table[256];
-#define mklower(c) (mklower_table[(unsigned char)(c)])
+#define mklower(c) (mklower_table[(unsigned char) (c)])
static char notend_table[256];
static char alt_notend_table[256];
#define notend(s) \
case FPREG:
default:
as_bad (_("unknown/incorrect operand"));
- /* abort(); */
+ /* abort (); */
}
install_gen_operand (s[1], tmpreg);
break;
{"pcrel", no_argument, NULL, OPTION_PCREL},
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
md_show_usage (stream)
FILE *stream;
{
- fprintf(stream, _("\
+ fprintf (stream, _("\
680X0 options:\n\
-l use 1 word for refs to undefined symbols [default 2]\n\
-m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
-m68881 | -m68882 | -mno-68881 | -mno-68882\n\
target has/lacks floating-point coprocessor\n\
[default yes for 68020, 68030, and cpu32]\n"));
- fprintf(stream, _("\
+ fprintf (stream, _("\
-m68851 | -mno-68851\n\
target has/lacks memory-management unit coprocessor\n\
[default yes for 68020 and up]\n\
struct option md_longopts[] = {
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
{
/* It's a fake opcode. Dig out the args and pretend that was
what we were passed. */
- ((void (*)()) opcode->name) (opcode, op_end);
+ ((void (*) ()) opcode->name) (opcode, op_end);
}
else
{
};
-#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg))
+#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
/* Given NAME, find the register number associated with that name, return
the integer value associated with the given name or -1 on failure. */
struct option md_longopts[] = {
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
md_show_usage (stream)
FILE *stream;
{
- fprintf(stream, _("\
+ fprintf (stream, _("\
PowerPC options:\n\
-u ignored\n\
-mpwrx, -mpwr2 generate code for IBM POWER/2 (RIOS2)\n\
-mregnames Allow symbolic names for registers\n\
-mno-regnames Do not allow symbolic names for registers\n"));
#ifdef OBJ_ELF
- fprintf(stream, _("\
+ fprintf (stream, _("\
-mrelocatable support for GCC's -mrelocatble option\n\
-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
-memb set PPC_EMB bit in ELF flags\n\
int len;
struct map_bfd *ptr;
-#define MAP(str,reloc) { str, sizeof(str)-1, reloc }
+#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
static struct map_bfd mapping[] = {
MAP ("l", BFD_RELOC_LO16),
as_bad (_("Unimplemented toc64 expression modifier"));
break;
default:
- fprintf(stderr,
+ fprintf (stderr,
_("Unexpected return value [%d] from parse_toc_entry!\n"),
toc_kind);
- abort();
+ abort ();
break;
}
offset = target_big_endian ? (4 - size) : 0;
if (size < 1 || size > 4)
- abort();
+ abort ();
fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, size,
&fixups[i].exp, reloc_howto->pc_relative,
break;
default:
- fprintf(stderr,
+ fprintf (stderr,
_("Gas failure, reloc value %d\n"), fixp->fx_r_type);
fflush(stderr);
abort ();
int len;
struct map_bfd *ptr;
-#define MAP(str,reloc) { str, sizeof(str)-1, reloc }
+#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
static struct map_bfd mapping[] = {
MAP ("got", BFD_RELOC_32_GOT_PCREL),
changed in read.c. Ideally it shouldn't have to know about it at all,
but nothing is ideal around here. */
-#define isoctal(c) ((unsigned)((c) - '0') < '8')
+#define isoctal(c) ((unsigned) ((c) - '0') < '8')
struct sparc_it
{
struct option md_longopts[] = {
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
md_show_usage (stream)
FILE *stream;
{
- fprintf(stream, _("\
+ fprintf (stream, _("\
Tahoe options:\n\
-a ignored\n\
-d LENGTH ignored\n\
struct option md_longopts[] = {
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
md_show_usage (stream)
FILE *stream;
{
- fprintf(stream, _("\
+ fprintf (stream, _("\
VAX options:\n\
-d LENGTH ignored\n\
-J ignored\n\
projects / external / binutils.git / commitdiff