"TARGET_ZBS"
[(set (match_dup 0) (zero_extract:GPR (match_dup 1) (const_int 1) (match_dup 2)))
(set (match_dup 0) (plus:GPR (match_dup 0) (const_int -1)))])
+
+;; Catch those cases where we can use a bseti/binvi + ori/xori or
+;; bseti/binvi + bseti/binvi instead of a lui + addi + or/xor sequence.
+(define_insn_and_split "*<or_optab>i<mode>_extrabit"
+ [(set (match_operand:X 0 "register_operand" "=r")
+ (any_or:X (match_operand:X 1 "register_operand" "r")
+ (match_operand:X 2 "uimm_extra_bit_or_twobits" "i")))]
+ "TARGET_ZBS"
+ "#"
+ "&& reload_completed"
+ [(set (match_dup 0) (<or_optab>:X (match_dup 1) (match_dup 3)))
+ (set (match_dup 0) (<or_optab>:X (match_dup 0) (match_dup 4)))]
+{
+ unsigned HOST_WIDE_INT bits = UINTVAL (operands[2]);
+ unsigned HOST_WIDE_INT topbit = HOST_WIDE_INT_1U << floor_log2 (bits);
+
+ operands[3] = GEN_INT (bits &~ topbit);
+ operands[4] = GEN_INT (topbit);
+})
+
+;; Same to use blcri + andi and blcri + bclri
+(define_insn_and_split "*andi<mode>_extrabit"
+ [(set (match_operand:X 0 "register_operand" "=r")
+ (and:X (match_operand:X 1 "register_operand" "r")
+ (match_operand:X 2 "not_uimm_extra_bit_or_nottwobits" "i")))]
+ "TARGET_ZBS"
+ "#"
+ "&& reload_completed"
+ [(set (match_dup 0) (and:X (match_dup 1) (match_dup 3)))
+ (set (match_dup 0) (and:X (match_dup 0) (match_dup 4)))]
+{
+ unsigned HOST_WIDE_INT bits = UINTVAL (operands[2]);
+ unsigned HOST_WIDE_INT topbit = HOST_WIDE_INT_1U << floor_log2 (~bits);
+
+ operands[3] = GEN_INT (bits | topbit);
+ operands[4] = GEN_INT (~topbit);
+})
;; from the same template.
(define_code_iterator any_bitwise [and ior xor])
+;; This code iterator allows ior and xor instructions to be generated
+;; from the same template.
+(define_code_iterator any_or [ior xor])
+
;; This code iterator allows unsigned and signed division to be generated
;; from the same template.
(define_code_iterator any_div [div udiv mod umod])
(plus "add")
(minus "sub")])
+;; <or_optab> code attributes
+(define_code_attr or_optab [(ior "ior")
+ (xor "xor")])
+
;; <insn> expands to the name of the insn that implements a particular code.
(define_code_attr insn [(ashift "sll")
(ashiftrt "sra")
(match_test "ctz_hwi (INTVAL (op)) > 0")
(match_test "SMALL_OPERAND (INTVAL (op) >> ctz_hwi (INTVAL (op)))")))
+;; A CONST_INT operand that has exactly two bits set.
+(define_predicate "const_twobits_operand"
+ (and (match_code "const_int")
+ (match_test "popcount_hwi (UINTVAL (op)) == 2")))
+
;; A CONST_INT operand that fits into the unsigned half of a
-;; signed-immediate after the top bit has been cleared.
+;; signed-immediate after the top bit has been cleared
(define_predicate "uimm_extra_bit_operand"
(and (match_code "const_int")
- (not (and (match_test "SMALL_OPERAND (INTVAL (op))")
- (match_test "INTVAL (op) > 0")))
- (ior (match_test "SMALL_OPERAND (UINTVAL (op) & ~(HOST_WIDE_INT_1U << floor_log2 (UINTVAL (op))))")
- (match_test "popcount_hwi (UINTVAL (op)) == 2"))))
+ (match_test "UIMM_EXTRA_BIT_OPERAND (UINTVAL (op))")))
+
+(define_predicate "uimm_extra_bit_or_twobits"
+ (and (match_code "const_int")
+ (ior (match_operand 0 "uimm_extra_bit_operand")
+ (match_operand 0 "const_twobits_operand"))))
+
+;; A CONST_INT operand that fits into the negative half of a
+;; signed-immediate after a single cleared top bit has been
+;; set: i.e., a bitwise-negated uimm_extra_bit_operand
+(define_predicate "not_uimm_extra_bit_operand"
+ (and (match_code "const_int")
+ (match_test "UIMM_EXTRA_BIT_OPERAND (~UINTVAL (op))")))
+
+(define_predicate "not_uimm_extra_bit_or_nottwobits"
+ (and (match_code "const_int")
+ (ior (match_operand 0 "not_uimm_extra_bit_operand")
+ (match_operand 0 "const_nottwobits_operand"))))
? (VALUE) \
: ((VALUE) & ((HOST_WIDE_INT_1U << 32)-1))))
+/* True if VALUE can be represented as an immediate with 1 extra bit
+ set: we check that it is not a SMALL_OPERAND (as this would be true
+ for all small operands) unmodified and turns into a small operand
+ once we clear the top bit. */
+#define UIMM_EXTRA_BIT_OPERAND(VALUE) \
+ (!SMALL_OPERAND (VALUE) \
+ && SMALL_OPERAND (VALUE & ~(HOST_WIDE_INT_1U << floor_log2 (VALUE))))
+
/* Stack layout; function entry, exit and calling. */
#define STACK_GROWS_DOWNWARD 1
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbs -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+
+long long f3(long long a)
+{
+ return a & ~0x1100;
+}
+
+long long f4 (long long a)
+{
+ return a & ~0x80000000000000ffull;
+}
+
+long long f5 (long long a)
+{
+ return a & ~0x8000001000000000ull;
+}
+
+long long f6 (long long a)
+{
+ return a & ~0xff7ffffffffffffull;
+}
+
+/* { dg-final { scan-assembler-times "bclri\t" 4 } } */
+/* { dg-final { scan-assembler-times "andi\t" 2 } } */
+
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbs -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+
+long long f3(long long a)
+{
+ return a ^ 0x1100;
+}
+
+long long f4 (long long a)
+{
+ return a ^ 0x80000000000000ffull;
+}
+
+long long f5 (long long a)
+{
+ return a ^ 0x8000001000000000ull;
+}
+
+/* { dg-final { scan-assembler-times "binvi\t" 4 } } */
+/* { dg-final { scan-assembler-times "xori\t" 2 } } */
+
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbs -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+
+long long foo1 (long long a)
+{
+ return a | 0x1100;
+}
+
+long long foo2 (long long a)
+{
+ return a | 0x80000000000000ffull;
+}
+
+long long foo3 (long long a)
+{
+ return a | 0x8000000100000000ull;
+}
+
+long long foo4 (long long a)
+{
+ return a | 0xfff;
+}
+
+/* { dg-final { scan-assembler-times "bseti\t" 5 } } */
+/* { dg-final { scan-assembler-times "ori\t" 3 } } */
+