set.flags = I915_SET_COLORKEY_NONE;
ret = drmCommandWrite(gfx_fd, DRM_I915_SET_SPRITE_COLORKEY, &set,
sizeof(set));
+ assert(ret == 0);
// Set up sprite output dimensions, initial position, etc.
if (out_w > prim_width / 2)
gettimeofday(&now, NULL);
if (now.tv_sec > end.tv_sec ||
(now.tv_sec == end.tv_sec && now.tv_usec >= end.tv_usec)) {
- ret = 0;
break;
}
if (!is_alive()) {
INFO_PRINT("gpu reset? restarting daemon\n");
intel_register_access_fini();
- ret = intel_register_access_init(intel_get_pci_device(),
- 1);
+ ret = intel_register_access_init(intel_get_pci_device(), 1);
+ if (ret)
+ INFO_PRINT("Reg access init fail\n");
}
sleep(1);
}
static void dump_avi_info(Transcoder transcoder)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val;
DipFrequency freq;
DipInfoFrame frame;
static void dump_vendor_info(Transcoder transcoder)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val;
DipFrequency freq;
DipInfoFrame frame;
static void dump_gamut_info(Transcoder transcoder)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val;
DipFrequency freq;
DipInfoFrame frame;
static void dump_spd_info(Transcoder transcoder)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val;
DipFrequency freq;
DipInfoFrame frame;
char vendor[9];
static void change_avi_infoframe(Transcoder transcoder, char *commands)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val;
DipInfoFrame frame;
char option[32];
uint32_t option_val;
static void change_spd_infoframe(Transcoder transcoder, char *commands)
{
Register reg = get_dip_ctl_reg(transcoder);
- uint32_t val = INREG(reg);
+ uint32_t val;
DipInfoFrame frame;
char option[16];
char option_val_s[32];