upstream: [media] rtl2832: style changes and minor cleanup
authorAntti Palosaari <crope@iki.fi>
Sun, 13 Oct 2013 03:06:44 +0000 (00:06 -0300)
committerChanho Park <chanho61.park@samsung.com>
Tue, 18 Nov 2014 02:54:48 +0000 (11:54 +0900)
Most of those were reported by checkpatch.pl...

debug module parameter is not used anywhere so remove it.

Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
drivers/media/dvb-frontends/rtl2832.c
drivers/media/dvb-frontends/rtl2832.h
drivers/media/dvb-frontends/rtl2832_priv.h

index ff73da9..ec668a7 100644 (file)
 
 /* Max transfer size done by I2C transfer functions */
 #define MAX_XFER_SIZE  64
-
-int rtl2832_debug;
-module_param_named(debug, rtl2832_debug, int, 0644);
-MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
-
 #define REG_MASK(b) (BIT(b + 1) - 1)
 
 static const struct rtl2832_reg_entry registers[] = {
@@ -189,8 +184,9 @@ static int rtl2832_wr(struct rtl2832_priv *priv, u8 reg, u8 *val, int len)
        if (ret == 1) {
                ret = 0;
        } else {
-               dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
-                               "len=%d\n", KBUILD_MODNAME, ret, reg, len);
+               dev_warn(&priv->i2c->dev,
+                               "%s: i2c wr failed=%d reg=%02x len=%d\n",
+                               KBUILD_MODNAME, ret, reg, len);
                ret = -EREMOTEIO;
        }
        return ret;
@@ -218,8 +214,9 @@ static int rtl2832_rd(struct rtl2832_priv *priv, u8 reg, u8 *val, int len)
        if (ret == 2) {
                ret = 0;
        } else {
-               dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
-                               "len=%d\n", KBUILD_MODNAME, ret, reg, len);
+               dev_warn(&priv->i2c->dev,
+                               "%s: i2c rd failed=%d reg=%02x len=%d\n",
+                               KBUILD_MODNAME, ret, reg, len);
                ret = -EREMOTEIO;
        }
        return ret;
@@ -417,7 +414,7 @@ static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)
 
        ret = rtl2832_wr_demod_reg(priv, DVBT_PSET_IFFREQ, pset_iffreq);
 
-       return (ret);
+       return ret;
 }
 
 static int rtl2832_init(struct dvb_frontend *fe)
@@ -522,7 +519,8 @@ static int rtl2832_init(struct dvb_frontend *fe)
 
        /*
         * r820t NIM code does a software reset here at the demod -
-        * may not be needed, as there's already a software reset at set_params()
+        * may not be needed, as there's already a software reset at
+        * set_params()
         */
 #if 1
        /* soft reset */
@@ -599,9 +597,9 @@ static int rtl2832_set_frontend(struct dvb_frontend *fe)
        };
 
 
-       dev_dbg(&priv->i2c->dev, "%s: frequency=%d bandwidth_hz=%d " \
-                       "inversion=%d\n", __func__, c->frequency,
-                       c->bandwidth_hz, c->inversion);
+       dev_dbg(&priv->i2c->dev,
+                       "%s: frequency=%d bandwidth_hz=%d inversion=%d\n",
+                       __func__, c->frequency, c->bandwidth_hz, c->inversion);
 
        /* program tuner */
        if (fe->ops.tuner_ops.set_params)
index 2cfbb6a..58cdde0 100644 (file)
@@ -58,7 +58,7 @@ struct rtl2832_config {
 };
 
 #if IS_ENABLED(CONFIG_DVB_RTL2832)
-extern struct dvb_frontend *rtl2832_attach(
+struct dvb_frontend *rtl2832_attach(
        const struct rtl2832_config *cfg,
        struct i2c_adapter *i2c
 );
index b5f2b80..4c845af 100644 (file)
@@ -267,7 +267,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001[] = {
        {DVBT_OPT_ADC_IQ,                0x1},
        {DVBT_AD_AVI,                    0x0},
        {DVBT_AD_AVQ,                    0x0},
-       {DVBT_SPEC_INV,                  0x0},
+       {DVBT_SPEC_INV,                  0x0},
 };
 
 static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
@@ -301,7 +301,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
        {DVBT_GI_PGA_STATE,              0x0},
        {DVBT_EN_AGC_PGA,                0x1},
        {DVBT_IF_AGC_MAN,                0x0},
-       {DVBT_SPEC_INV,                  0x0},
+       {DVBT_SPEC_INV,                  0x0},
 };
 
 static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
@@ -339,32 +339,32 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
        {DVBT_REG_MONSEL,                0x1},
        {DVBT_REG_MON,                   0x1},
        {DVBT_REG_4MSEL,                 0x0},
-       {DVBT_SPEC_INV,                  0x0},
+       {DVBT_SPEC_INV,                  0x0},
 };
 
 static const struct rtl2832_reg_value rtl2832_tuner_init_r820t[] = {
-       {DVBT_DAGC_TRG_VAL,             0x39},
-       {DVBT_AGC_TARG_VAL_0,           0x0},
-       {DVBT_AGC_TARG_VAL_8_1,         0x40},
-       {DVBT_AAGC_LOOP_GAIN,           0x16},
-       {DVBT_LOOP_GAIN2_3_0,           0x8},
-       {DVBT_LOOP_GAIN2_4,             0x1},
-       {DVBT_LOOP_GAIN3,               0x18},
-       {DVBT_VTOP1,                    0x35},
-       {DVBT_VTOP2,                    0x21},
-       {DVBT_VTOP3,                    0x21},
-       {DVBT_KRF1,                     0x0},
-       {DVBT_KRF2,                     0x40},
-       {DVBT_KRF3,                     0x10},
-       {DVBT_KRF4,                     0x10},
-       {DVBT_IF_AGC_MIN,               0x80},
-       {DVBT_IF_AGC_MAX,               0x7f},
-       {DVBT_RF_AGC_MIN,               0x80},
-       {DVBT_RF_AGC_MAX,               0x7f},
-       {DVBT_POLAR_RF_AGC,             0x0},
-       {DVBT_POLAR_IF_AGC,             0x0},
-       {DVBT_AD7_SETTING,              0xe9f4},
-       {DVBT_SPEC_INV,                 0x1},
+       {DVBT_DAGC_TRG_VAL,             0x39},
+       {DVBT_AGC_TARG_VAL_0,            0x0},
+       {DVBT_AGC_TARG_VAL_8_1,         0x40},
+       {DVBT_AAGC_LOOP_GAIN,           0x16},
+       {DVBT_LOOP_GAIN2_3_0,            0x8},
+       {DVBT_LOOP_GAIN2_4,              0x1},
+       {DVBT_LOOP_GAIN3,               0x18},
+       {DVBT_VTOP1,                    0x35},
+       {DVBT_VTOP2,                    0x21},
+       {DVBT_VTOP3,                    0x21},
+       {DVBT_KRF1,                      0x0},
+       {DVBT_KRF2,                     0x40},
+       {DVBT_KRF3,                     0x10},
+       {DVBT_KRF4,                     0x10},
+       {DVBT_IF_AGC_MIN,               0x80},
+       {DVBT_IF_AGC_MAX,               0x7f},
+       {DVBT_RF_AGC_MIN,               0x80},
+       {DVBT_RF_AGC_MAX,               0x7f},
+       {DVBT_POLAR_RF_AGC,              0x0},
+       {DVBT_POLAR_IF_AGC,              0x0},
+       {DVBT_AD7_SETTING,            0xe9f4},
+       {DVBT_SPEC_INV,                  0x1},
 };
 
 #endif /* RTL2832_PRIV_H */