BDW support HF data type, so use mov directly to convert between Half Float/Float.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
gen8_insn->bits3.gen7_typed_rw.slot = 1;
}
+ void Gen8Encoder::F16TO32(GenRegister dest, GenRegister src0) {
+ MOV(GenRegister::retype(dest, GEN_TYPE_F), GenRegister::retype(src0, GEN_TYPE_HF));
+ }
+
+ void Gen8Encoder::F32TO16(GenRegister dest, GenRegister src0) {
+ MOV(GenRegister::retype(dest, GEN_TYPE_HF), GenRegister::retype(src0, GEN_TYPE_F));
+ }
+
void Gen8Encoder::ATOMIC(GenRegister dst, uint32_t function, GenRegister src, uint32_t bti, uint32_t srcNum) {
GenNativeInstruction *insn = this->next(GEN_OPCODE_SEND);
Gen8NativeInstruction *gen8_insn = &insn->gen8_insn;
virtual void patchJMPI(uint32_t insnID, int32_t jip, int32_t uip);
/*! Get double/long exec width */
virtual int getDoubleExecWidth(void) { return GEN8_DOUBLE_EXEC_WIDTH; }
+ virtual void F16TO32(GenRegister dest, GenRegister src0);
+ virtual void F32TO16(GenRegister dest, GenRegister src0);
virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp = GenRegister::null());
virtual void LOAD_DF_IMM(GenRegister dest, GenRegister tmp, double value);
virtual void ATOMIC(GenRegister dst, uint32_t function, GenRegister src, uint32_t bti, uint32_t srcNum);
#define GEN_TYPE_UB 4
#define GEN_TYPE_B 5
#define GEN_TYPE_VF 5 /* packed float vector, immediates only? */
-#define GEN_TYPE_HF 6
#define GEN_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
#define GEN_TYPE_DF 6
#define GEN_TYPE_F 7
#define GEN_TYPE_UL 8
#define GEN_TYPE_L 9
+#define GEN_TYPE_HF 10
#define GEN_ARF_NULL 0x00
#define GEN_ARF_ADDRESS 0x10
}
}
+ void GenEncoder::F16TO32(GenRegister dest, GenRegister src0) {
+ alu1(this, GEN_OPCODE_F16TO32, dest, src0);
+ }
+
+ void GenEncoder::F32TO16(GenRegister dest, GenRegister src0) {
+ alu1(this, GEN_OPCODE_F32TO16, dest, src0);
+ }
+
ALU1(MOV)
ALU1(RNDZ)
ALU1(RNDE)
ALU1(FBH)
ALU1(FBL)
ALU1(CBIT)
- ALU1(F16TO32)
- ALU1(F32TO16)
ALU2(SEL)
ALU1(NOT)
ALU2_MOD(AND)
ALU1(RNDE)
ALU1(RNDD)
ALU1(RNDU)
- ALU1(F16TO32)
- ALU1(F32TO16)
ALU2(SEL)
ALU1(NOT)
ALU2_MOD(AND)
#undef ALU2
#undef ALU2_MOD
#undef ALU3
+
+ virtual void F16TO32(GenRegister dest, GenRegister src0);
+ virtual void F32TO16(GenRegister dest, GenRegister src0);
/*! Get double/long exec width */
virtual int getDoubleExecWidth(void) = 0;
virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp = GenRegister::null());