drm/amd/display: Copy over soc values before bounding box creation
authorSung Lee <sung.lee@amd.com>
Thu, 4 Feb 2021 13:21:15 +0000 (08:21 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 18 Feb 2021 21:43:10 +0000 (16:43 -0500)
[Why]
With certain fclock overclocks, state 1 may be chosen
as the closest clock level. This may result in this state
being empty if not populated beforehand, resulting in
black screens and screen corruption.

[How]
Copy over all soc states to clock_limits before bounding
box creation to avoid any cases with empty states.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

index 2b3f049..a30ba6c 100644 (file)
@@ -1599,6 +1599,11 @@ static void update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param
        dcn2_1_soc.num_chans = bw_params->num_channels;
 
        ASSERT(clk_table->num_entries);
+       /* Copy dcn2_1_soc.clock_limits to clock_limits to avoid copying over null states later */
+       for (i = 0; i < dcn2_1_soc.num_states + 1; i++) {
+               clock_limits[i] = dcn2_1_soc.clock_limits[i];
+       }
+
        for (i = 0; i < clk_table->num_entries; i++) {
                /* loop backwards*/
                for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) {