From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D53265
llvm-svn: 345809
case 's': // VSX vector register to hold scalar float data
case 'a': // Any VSX register
case 'c': // An individual CR bit
+ case 'i': // FP or VSX register to hold 64-bit integers data
break;
default:
return false;